MOS Contact Hole Barrier Stack for Lower ON Voltage
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Solution Overview
Problem
Existing semiconductor devices face challenges in effectively reducing ON voltage and improving switching performance due to limitations in the design and materials used in the contact holes, particularly in the barrier films.
Innovation Solution
The semiconductor device incorporates a dense first barrier metal layer of TiN formed by annealing Ti on the side walls of the interlayer dielectric film, followed by a second barrier metal layer of TiN formed by sputtering, along with a titanium silicide layer, to enhance the integrity and conductivity of the contact holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single barrier metal layer is used in the contact hole, then the manufacturing process is simple, but the conductivity and ON voltage performance are insufficient
Solution Approach 1:
The barrier film is divided into multiple layers: a first barrier metal layer (e.g., Ti) and a second barrier metal layer (e.g., TiN), each serving distinct functions. The first layer provides adhesion and initial barrier properties, while the second layer enhances conductivity and forms low-resistance contacts, thereby improving overall performance without requiring a single complex material
Solution Approach 2:
The invention uses composite barrier film structures combining different metal materials (Ti, TiN, or other compatible metal combinations) to achieve properties that neither material could provide alone. This composite approach enables both adequate barrier functionality and improved electrical conductivity, resolving the contradiction between performance and complexity
2Loss of energy
If conventional barrier films are used in contact holes, then the manufacturing process is straightforward, but switching losses are high
Solution Approach 1:
The invention changes the material parameters of the barrier film by selecting specific metals (Ti, TiN, or their combinations) with optimized electrical and barrier properties. This parameter optimization reduces contact resistance and switching losses while maintaining manufacturability through established deposition techniques
Solution Approach 2:
The first barrier metal layer is deposited and processed in advance to establish adhesion and basic barrier properties before the second layer is added. This preliminary action ensures that the subsequent layer can be optimized for conductivity without compromising the overall barrier function, enabling energy efficiency improvements through structured material selection
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the conductivity and reduces ON voltage, enhancing the switching performance and reducing switching losses in the semiconductor device.
Implementation Method 1
a dense first barrier metal layer of TiN formed by annealing Ti
Implementation Method 2
a second barrier metal layer of TiN formed by sputtering
Implementation Method 3
along with a titanium silicide layer, to enhance the integrity and conductivity of the contact holes
Data Source
AI summary
Provided is a semiconductor device including a MOS gate structure provided in a semiconductor substrate, including: an interlayer dielectric film which includes a contact hole and is provided above the semiconductor substrate; a conductive first barrier metal layer provided on side walls of the interlayer dielectric film in the contact hole; a conductive second barrier metal layer stacked on the first barrier metal layer in the contact hole; and a silicide layer provided on an upper surface of the semiconductor substrate below the contact hole, in which the first barrier metal layer is more dense than the second barrier metal layer, and a film thickness thereof is 1 nm or more and 10 nm or less.