MOS Decoupling Circuit With Variable Capacitance for Resonance Tuning
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Solution Overview
Problem
Existing decoupling circuits in semiconductor integrated circuits have a fixed capacitance value, making it difficult to control the resonance frequency of the chip, as the coupling relationship between MOS transistors is fixed, preventing the capacitance value from being changed.
Innovation Solution
A decoupling circuit design that includes a first inverter coupled between two power supplies, with specific configurations of transistors that allow the capacitance value to change based on input signals, enabling the control of resonance frequency by varying the gate areas of transistors that turn on and off in response to the signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed capacitance value is used in the decoupling circuit, then the circuit structure is simple and area-efficient, but the resonance frequency cannot be controlled
Solution Approach 1:
The patent applies the Dynamics principle by making the decoupling capacitance value adjustable through control signals. The capacitance value is dynamically changed by controlling the switching of transistor pairs, allowing the resonance frequency to be adjusted without fundamentally changing the circuit topology. This resolves the contradiction by enabling frequency control while maintaining a relatively simple circuit structure.
Solution Approach 2:
The patent applies the Parameter changes principle by varying the effective capacitance value through control signals that switch transistor pairs on and off. By changing the operational state of transistors, the effective capacitance seen by the power supply network is adjusted, thereby controlling the resonance frequency. This allows parameter adjustment without adding complex external components.
2Adaptability or versatility
If multiple transistor pairs are used to adjust capacitance value, then the resonance frequency can be controlled, but the area occupation increases
Solution Approach 1:
The patent applies the Merging principle by combining multiple functions into the same transistor pairs. The transistors serve dual purposes: they provide ESD protection functionality and simultaneously act as switching elements for capacitance adjustment. By merging these functions, the patent avoids needing separate ESD protection structures, thereby reducing overall chip area while still enabling capacitance control.
Solution Approach 2:
The patent applies the Universality principle by designing the transistor pairs to perform multiple functions. The same transistors that provide electrostatic discharge protection also serve as the switching mechanism for adjusting decoupling capacitance. This multi-functionality eliminates the need for dedicated ESD protection area, allowing capacitance control without proportionally increasing chip area.
3Adaptability or versatility
If the coupling relationship between MOS transistors is fixed, then the manufacturing process is simple, but the capacitance value cannot be changed
Solution Approach 1:
The patent applies the Dynamics principle by introducing control signals that dynamically change the coupling relationship between transistor pairs. The transistors switch between different operational states (on/off) based on control signals, thereby dynamically adjusting the effective capacitance. This dynamic control is achieved through standard CMOS processing without requiring additional manufacturing steps.
Solution Approach 2:
The patent applies the Self-service principle by using the inherent properties of MOS transistors (gate control capability) to achieve capacitance adjustment. The transistors self-regulate their conductive state in response to control signals, automatically adjusting the effective capacitance without requiring external adjustment mechanisms or complex manufacturing processes. The standard CMOS fabrication process naturally supports this functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The decoupling circuit can switch its capacitance value in response to a single enable signal, allowing for the adjustment of resonance frequency and improving area efficiency and high-speed operation, while maintaining effective ESD protection without increasing the number of processes.
Implementation Method 1
a series coupling of an on-resistance of the n-type MOS transistor and a gate capacitance of the p-type MOS transistor, and a series coupling of an on-resistance of the p-type MOS transistor and a gate capacitance of the n-type MOS transistor are formed between the power supply line and the ground line
Implementation Method 2
each of the n-type MOS transistor and the p-type MOS transistor functions as both of the gate capacitance and an ESD protection resistance
Data Source
AI summary
A decoupling circuit includes an inverter. The inverter includes i (i is an integer of 1 or more) PMOS transistors each having a first gate electrode, and j (j is an integer of 0 or more) PMOS transistors each having a second gate electrode. The inverter includes m (m is an integer of 1 or more) NMOS transistors each having a third gate electrode, and n (n is an integer of 0 or more) NMOS transistors each having a fourth gate electrode. The first to fourth gate electrodes are coupled to an input end of the inverter. A total area of the first and second gate electrodes is different from a total area of the third and fourth gate electrodes.