MOS Gate Dielectric Passivation for Threshold Voltage Stability
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Solution Overview
Problem
Current techniques for improving threshold voltage stability and mitigating leakage current in semiconductor devices, such as MOS transistors, are inadequate, leading to instability and performance degradation due to trap defects in the dielectric and silicon materials.
Innovation Solution
A passivation scheme is introduced using trap-repairing elements like nitrogen, fluorine, and hydrogen to terminate trap defects in the dielectric and silicon materials, thereby enhancing the charging and discharging characteristics of carriers and reducing threshold voltage instability and device noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional techniques are used to improve threshold voltage stability and mitigate leakage current, then device performance is partially improved, but trap defects in dielectric and silicon materials persist causing instability and performance degradation
Solution Approach 1:
The patent introduces trap-repairing elements (nitrogen, fluorine, hydrogen) that actively target and neutralize trap defects. These elements are deliberately introduced into the dielectric and silicon materials to convert the harmful trap defects into beneficial passivated sites, thereby improving threshold voltage stability and reducing leakage current through chemical passivation mechanisms
2Productivity
If device dimensions are reduced to continue scaling, then manufacturing cost and processing time are reduced, but control of threshold voltage stability and mitigation of leakage current becomes more difficult
Solution Approach 1:
The patent changes the chemical and physical parameters of the dielectric and silicon materials by introducing trap-repairing elements. This modifies the material properties at the atomic level, creating a more robust structure that maintains threshold voltage stability even as device dimensions are reduced for continued scaling
3Productivity
If device dimensions are reduced to continue scaling, then manufacturing cost and processing time are reduced, but leakage current increases due to reduced voltage margins
Solution Approach 1:
The patent converts the harmful leakage current phenomenon into a controlled parameter by introducing trap-repairing elements that passivate leakage paths. The nitrogen, fluorine, and hydrogen atoms bond with dangling bonds and defect sites that would otherwise create leakage channels, thereby reducing leakage current while maintaining scaled device dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively diminishes trap defects, improving the stability and performance of MOS transistors by better controlling carrier movement and reducing issues like threshold voltage instability and device noise.
Implementation Method 1
A passivation scheme is introduced using trap-repairing elements like nitrogen, fluorine, and hydrogen to terminate trap defects in the dielectric and silicon materials
Data Source
AI summary
A method of manufacturing a semiconductor device includes: providing a substrate comprising a surface; depositing a first dielectric layer and a second dielectric layer over the substrate; performing a first treatment by introducing a trap-repairing element on the first and second dielectric layers; forming a dummy gate electrode over the second dielectric layer; forming a gate spacer surrounding the dummy gate electrode; forming lightly-doped source/drain (LDD) regions in the substrate on two sides of the gate spacer; forming source/drain regions in the respective LDD regions; removing the dummy gate electrode to form a replacement gate; and forming an inter-layer dielectric (ILD) layer over the replacement gate and the source/drain regions.