MOS Transistor Failure Detection Using Drain-Line Voltage Bias
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Solution Overview
Problem
Existing integrated circuits for detecting switch failures in MOS transistors require complex detection circuits to monitor voltage changes, which is inefficient and prone to errors.
Innovation Solution
An integrated circuit design that includes a detection circuit to monitor the voltage level of a line connected to the drain electrodes of MOS transistors, using a voltage generation circuit to apply a reference voltage and prevent floating states, allowing for the detection of abnormalities in MOS transistors without a complicated configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage monitoring is implemented to detect MOS transistor failures, then detection capability is improved, but circuit complexity increases
Solution Approach 1:
The MOS transistor's own body diode is utilized for failure detection. When the transistor fails, the body diode's state change (forward voltage drop) directly indicates the failure condition, eliminating the need for external monitoring circuits. The transistor essentially monitors itself through its inherent diode structure.
Solution Approach 2:
The detection function is extracted from a separate complex monitoring circuit and integrated into the transistor's own body diode characteristic. By monitoring the voltage at the drain electrode which reflects the body diode state, the detection capability is achieved without adding external detection hardware.
2Reliability
If voltage monitoring is implemented to detect MOS transistor failures, then detection capability is improved, but power consumption increases
Solution Approach 1:
The body diode provides passive failure indication through its inherent electrical characteristics. No active power-consuming monitoring circuitry is needed; the voltage level at the drain electrode naturally changes when the transistor fails, providing detection capability without additional power consumption.
3Device complexity
If the first line is left floating during MOS transistor off state, then circuit simplicity is maintained, but detection accuracy deteriorates due to floating state
Solution Approach 1:
A pull-up resistor is pre-connected between the first line and the power supply terminal to establish a defined voltage level before detection. This preliminary action ensures that when the MOS transistor is off, the first line is already at a known voltage state, eliminating the floating state issue and enabling accurate failure detection.
Data Source
AI summary
An integrated circuit for a semiconductor device that includes a first terminal for receiving a power supply voltage, a second terminal to which a load is to be coupled, and first and second metal-oxide-semiconductor (MOS) transistors each having a drain electrode and a source electrode, the source electrodes being respectively coupled to the first and second terminals. The integrated circuit includes a first line coupled to the drain electrode of the first MOS transistor and the drain electrode of the second MOS transistor, a second line to which a first voltage lower than the power supply voltage is applied, a first device configured to couple the first line and the second line, to prevent the first line from being brought into a floating state, and a detection circuit configured to detect a first abnormality in at least the first MOS transistor based on a voltage level of the first line.