High Voltage MOS Array Gate Contact on Extended Drain
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High voltage MOS device power arrays, such as LDMOS and DeMOS, face challenges with switching characteristics due to a distributed capacitive-resistive network caused by gate connections outside the active region, which increases parasitic resistance and footprint.
Innovation Solution
Incorporating polysilicon gate contacts within the active region between the drain and source, with additional gate contacts along the gate width, and using a metal layer for electrical connection, reduces parasitic resistance and footprint by minimizing the distributed RC network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If gate connections are located outside the active region, then the device structure is simpler to manufacture, but parasitic resistance increases and switching characteristics deteriorate
Solution Approach 1:
The gate contacts are moved from the lateral dimension (outside the active region) to the vertical dimension (within the active region on the drain side), utilizing the third dimension of the device structure to resolve the contradiction between manufacturing simplicity and switching performance
2Ease of manufacture
If gate connections are located outside the active region, then manufacturing is easier, but device footprint increases
Solution Approach 1:
By relocating gate contacts to the vertical dimension within the active region, the lateral footprint is reduced while maintaining manufacturing feasibility through the extended drain region structure
3Device complexity
If gate connections are located outside the active region, then the structure is simpler, but distributed capacitive-resistive network increases
Solution Approach 1:
The harmful distributed RC network is extracted and eliminated by removing the lateral gate connection structure outside the active region, replacing it with vertical contacts that directly access the gate through the extended drain region
Solution Approach 2:
The gate connection topology is changed from lateral (2D plane) to vertical (3D depth), moving contacts into the extended drain region to eliminate the distributed RC network while maintaining structural simplicity
Data Source
AI summary
In an extended drain MOS device used in high voltage applications, switching characteristics are improved by providing for at least one base contact in the active region in the extended drain space.