MOS Gate Doping Layout for Stable Bandgap Reference Voltage
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Solution Overview
Problem
Existing bandgap reference circuits in semiconductor devices are sensitive to transistor aging, leading to variations in threshold voltages and consequently unstable bandgap reference voltage outputs.
Innovation Solution
A semiconductor device comprising a first and second MOS transistor on a substrate, where the second MOS transistor has a gate electrode with a narrow doping portion of one conductivity type surrounded by wider portions of opposite conductivity type, electrically connected to the first MOS transistor to minimize variations in threshold voltage drift.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bandgap reference circuits use standard MOS transistor configurations, then the circuit can be manufactured with standard processes, but the transistors experience different aging rates causing threshold voltage drift and unstable reference voltage output
Solution Approach 1:
The gate electrode is designed with non-uniform doping distribution, creating regions of different conductivity types (first conductivity type in the first region, second conductivity type in the second region). This local quality variation compensates for aging effects by creating transistors with matched threshold voltage drift characteristics, thereby stabilizing the bandgap reference voltage output against aging-induced variations.
2Reliability
If the gate electrode has a narrow doping portion with width less than half the total width, then the transistor aging characteristics are matched to stabilize reference voltage, but the manufacturing process becomes more complex
Solution Approach 1:
The gate electrode is segmented into distinct doped regions along its length, with the first region having a narrow width (less than half the total gate width) and different conductivity type than the second region. This segmentation allows independent optimization of each region's doping characteristics to achieve matched aging behavior while maintaining compatibility with standard semiconductor fabrication processes.
Data Source
AI summary
A semiconductor device includes a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor on a substrate. The second MOS transistor is electrically connected to the first MOS transistor. The first MOS transistor includes a first gate dielectric layer and a first gate electrode on the first gate dielectric layer. The second MOS transistor includes a second gate dielectric layer and a second gate electrode on the second gate dielectric layer. The second gate electrode includes a first portion of a first conductivity type and second portions of a second conductivity type on opposite sides of the first portion. The width of the first portion is less than half of the total width of the second gate electrode.