MOS Transistor Gate Metal Region Formation via Hard Mask Diffusion
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Solution Overview
Problem
The formation of different metal gates for MOS transistors often damages the gate dielectric layer during etching, leading to electrical leakage between the gate and underlying regions.
Innovation Solution
A method involving the formation of a metal layer on a gate dielectric layer, followed by a metal hard mask with a different composition, diffusion annealing to integrate metal atoms from the hard mask into specific regions, and subsequent removal of the hard mask, ensuring the dielectric layer remains protected and undamaged.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching steps are implemented to bound the gates of transistors within the multilayer, then the gate regions are properly defined and separated, but the gate dielectric layer may be damaged leading to electrical leakage
Solution Approach 1:
A metal hard mask layer is introduced as an intermediary between the etching process and the gate dielectric layer. This hard mask serves as a sacrificial protective layer that absorbs the etching damage, preventing direct contact between the etch chemistry and the gate dielectric. The hard mask is removed after serving its protective function, leaving the gate dielectric intact while still achieving proper gate region definition.
Solution Approach 2:
The metal hard mask is deposited onto the gate metal layer before any etching operations are performed. This preliminary action establishes a protective barrier in advance, ensuring that when subsequent etching steps are carried out to define gate regions, the gate dielectric layer is already protected from potential damage.
2Adaptability or versatility
If different metal layers are deposited and etched to form different gate metal regions, then the desired physical-chemical compositions for NMOS and PMOS transistors are achieved, but the process complexity increases with multiple deposition and etching steps
Solution Approach 1:
The metal hard mask is selectively deposited only in regions where a different gate metal composition is desired (e.g., only in PMOS regions). This local application allows different gate metal compositions to be achieved in different transistor regions without requiring complete re-deposition of metal layers across the entire wafer, thereby reducing overall process complexity while maintaining composition control.
Solution Approach 2:
The composition of the gate metal layer is modified by controlling the diffusion of metal atoms from the hard mask into the gate metal layer during thermal annealing. By adjusting annealing temperature, time, and atmosphere, precise control over the final metal composition is achieved, enabling different gate characteristics for NMOS and PMOS transistors through a single annealing step rather than multiple deposition steps.
3Manufacturing precision
If the gate dielectric layer is opened during etching to access underlying regions, then proper transistor structure formation is achieved, but electrical leakage between gate and underlying regions occurs
Solution Approach 1:
The metal hard mask acts as an intermediary protective layer during etching operations. It allows the etching process to proceed and define the transistor structure while preventing the etch chemistry from directly exposing or damaging the gate dielectric layer. This maintains the integrity of the gate dielectric barrier, preventing electrical leakage between the gate and underlying regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the creation of MOS transistors with desired physical-chemical compositions for both NMOS and PMOS types without damaging the gate dielectric layer, reducing the risk of electrical leakage and enabling precise control of electrical characteristics through rapid thermal annealing.
Implementation Method 1
diffusion annealing the intermediate structure obtained in step b) in such a manner as to make the metal atoms of the hard mask diffuse into the first region
Implementation Method 2
by using a gas comprising nitrogen, and in particular a gas which does not comprise any oxygen, the oxidation of the metal layer of the second region, which is not protected by the hard mask, is avoided
Data Source
AI summary
A method is for forming at least two different gates metal regions of at least two MOS transistors. The method may include forming a metal layer on a gate dielectric layer; and forming a metal hard mask on the metal layer, with the hard mask having a composition different from that of the metal layer and covering a first region of the metal layer and leaving open a second region of the metal layer. The method may also include diffusion annealing the intermediate structure obtained in the prior steps such as to make the metal atoms of the hard mask diffuse into the first region, and removal of the hard mask.