Electrostatic Protection Circuit for MOS Transistor Gate Oxide

Solution Overview

Problem

As semiconductor integrated circuit devices shrink, their tolerance to electrostatic discharge (ESD) decreases, particularly due to the reduction in gate oxide film thickness, leading to a smaller design window for ESD protection, which existing electrostatic protection circuits struggle to maintain without affecting normal signal input.

Innovation Solution

An electrostatic protection circuit design that includes a MOS transistor with its gate and source connected to separate terminals, featuring an electrostatic protection element between the drain and gate of the MOS transistor, and another between the input and power/ground terminals, maintaining high impedance to normal signals while alleviating voltage stress on the gate insulating film during ESD, using sub-protection elements to extend the design window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the gate oxide film thickness is reduced to shrink transistor size, then the integration density is improved, but the breakdown voltage of the gate oxide film rapidly reduces

Engineering Contradiction:

Improvetransistor sizeVSAvoidbreakdown voltage of gate oxide film

Core Design Contradiction:

Area of moving objectVSStrength

Solution Approach 1:

The protection function is segmented into two distinct elements: a main protection element (first electrostatic protection element) that handles large ESD currents, and a sub-protection element (second electrostatic protection element) that specifically protects the gate oxide film. This segmentation allows each element to be optimized for its specific function, resolving the contradiction between small transistor size and adequate protection voltage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The sub-protection element acts as an intermediary between the input terminal and the gate of the MOS transistor. It provides an additional protection layer that specifically addresses the gate oxide film's vulnerability to voltage stress, mediating between the main protection element and the sensitive gate structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a sub-protection element is added to extend the design window, then the ESD tolerance is improved, but the device complexity increases

Engineering Contradiction:

ImproveESD toleranceVSAvoidprotection circuit structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The two electrostatic protection elements are merged into a unified protection circuit structure that works synergistically. The main protection element and sub-protection element are combined to provide comprehensive ESD protection, achieving extended design window without proportionally increasing complexity.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The protection circuit design provides multi-functionality: the main protection element handles large current discharge, while the sub-protection element provides gate-specific voltage protection. This universal protection approach covers multiple failure modes with a relatively compact circuit structure.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Device complexity

If the main protection element alone is used, then the device complexity is minimized, but the electrostatic discharge voltage cannot be completely eliminated

Engineering Contradiction:

Improveprotection circuit structureVSAvoidelectrostatic discharge voltage

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The protection function is segmented into two distinct elements: a main protection element (first electrostatic protection element) that handles large ESD currents, and a sub-protection element (second electrostatic protection element) that specifically protects the gate oxide film. This segmentation allows each element to be optimized for its specific function, resolving the contradiction between small transistor size and adequate protection voltage.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The sub-protection element acts as an intermediary between the input terminal and the gate of the MOS transistor. It provides an additional protection layer that specifically addresses the gate oxide film's vulnerability to voltage stress, mediating between the main protection element and the sensitive gate structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively protects MOS transistors from ESD without degrading normal input signals by ensuring the voltage applied to the gate insulating film remains below damaging levels, thereby enhancing ESD tolerance without impacting signal integrity.

Implementation Method 1

protection circuit against electrostatic discharge (ESD) flowing from external terminals

Methodology Applied

Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS8125749B2Electrostatic protection circuit

Publication Date: 2012.02.28 RENESAS ELECTRONICS CORP

AI summary

An electrostatic protection circuit includes a first terminal, a second terminal, an input circuit which includes a Metal Oxide Semiconductor (MOS) transistor including a gate, a source, and a drain, the gate as an input terminal being coupled to the first terminal, the source being coupled to the second terminal, an electrostatic protection element connected to the drain, the electrostatic protection element including a first electrostatic protection element, and a second electrostatic protection element connected between the first terminal and the second terminal.