MOS Gate Pull-Down Circuit for Switch-Off and Oxide Testing

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Solution Overview

Problem

Existing electronic circuits for MOS transistors face challenges in efficiently switching off the transistor during power supply lack and abrupt drain voltage changes, especially for transistors with thin gate oxides, and require a trade-off in pull-down resistor values for both switching off and gate oxide testing.

Innovation Solution

An electronic circuit with a resistor connected to the gate terminal and an auxiliary pad, where the auxiliary pad is floating during testing and connected to the source terminal during normal operation, allowing for a low resistance value without interfering with gate oxide testing, and effectively switching off the transistor by discharging the gate voltage across the resistor during power supply loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a high resistance pull-down resistor is used for gate oxide testing, then gate oxide testing can be performed, but the transistor cannot be efficiently switched off during power loss or abrupt drain voltage changes

Engineering Contradiction:
Improvegate oxide testing capabilityVSAvoidtransistor switch-off reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The pull-down resistor is transformed from a static component into a dynamic element that changes its resistance value based on operating conditions. During normal operation and testing, the resistor presents high impedance to avoid interfering with gate oxide measurements. During power loss or abrupt drain voltage changes, the resistor automatically switches to low impedance state to efficiently discharge the gate terminal and switch off the transistor.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The resistance parameter of the pull-down resistor is changed dynamically between two states: high resistance during normal operation and gate oxide testing, and low resistance during power loss or abnormal conditions. This parameter change is achieved through the interaction between the resistor and the parasitic capacitance, which causes the resistor to automatically adjust its effective impedance based on the voltage conditions at the drain and gate terminals.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a low resistance pull-down resistor is used for efficient switching off, then the transistor can be switched off quickly, but gate oxide testing becomes inaccurate due to current leakage

Engineering Contradiction:
Improvetransistor switch-off speedVSAvoidgate oxide testing accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The pull-down resistor dynamically adjusts its impedance characteristics based on the operating state of the transistor. During gate oxide testing, the resistor maintains high impedance to prevent current leakage that would interfere with measurements. During power loss or abrupt drain voltage changes, the resistor automatically transitions to low impedance state to provide rapid discharge path for the gate terminal, ensuring quick switch-off.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit is designed to anticipate potential power loss or abnormal conditions by maintaining the transistor in a reliably switched-off state through the pull-down resistor's automatic response. The resistor is positioned and configured to immediately counteract any voltage changes at the gate terminal caused by parasitic capacitance, preventing unwanted transistor activation before it can cause damage.

Inventive Principle:
Principle #9Preliminary anti-action

3Device complexity

If a fixed resistance value is used for the pull-down resistor, then the circuit is simple, but it cannot simultaneously optimize both switching off performance and gate oxide testing

Engineering Contradiction:
Improvecircuit simplicityVSAvoiddual-function performance
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The pull-down resistor serves multiple functions through its dynamic impedance characteristics: during normal operation and gate oxide testing, it acts as a high-impedance element that does not interfere with measurements; during power loss or abrupt drain voltage changes, it acts as a low-impedance discharge path for rapid switch-off. This multi-functionality is achieved without adding extra components, maintaining circuit simplicity while enabling both optimized switching performance and accurate gate oxide testing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the use of a low resistance pull-down resistor for efficient switching off of MOS transistors, including those with thin gate oxides, while maintaining the ability to perform gate oxide testing without affecting the test results.

Implementation Method 1

A resistor has a first terminal connected to the gate terminal and has a second terminal connected to an auxiliary pad

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

the voltage change of the drain terminal is transferred to the gate terminal, due to the parasitic capacitance between the drain and the gate terminals

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9024652B2Electronic circuit and method for testing and keeping a MOS transistor switched-off
Publication Date: 2015.05.05 STMICROELECTRONICS SRL
  • US9024652B2 patent drawing
  • US9024652B2 patent drawing
  • US9024652B2 patent drawing

AI summary

The electronic circuit includes a transistor having a gate terminal, a source terminal and a drain terminal. A resistor has a first terminal connected to the gate terminal and has a second terminal connected to an auxiliary pad. When the electronic circuit is operating in a test phase and is configured for receiving a test signal for performing the test of the transistor, the auxiliary pad is electrically floating. When the electronic circuit is operating in a normal phase and is configured for receiving a supply voltage, the auxiliary pad is electrically connected to a voltage value smaller than the sum of the voltage value of the source terminal with the threshold voltage value of the transistor.