MOS Isolation Structure Nitrogen Oxygen Ion Implantation

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Solution Overview

Problem

Conventional shallow trench isolation structures for MOS transistors face challenges in size control and stress management, leading to poor electrical properties due to poor etching directivity and tensile or compressive stresses in PMOS and NMOS active regions.

Innovation Solution

A method involving the implantation of nitrogen ions into PMOS isolation regions and oxygen ions into NMOS isolation regions, with partial overlap to form a buffer isolation region, generating specific stresses that enhance hole and electron migration, while controlling the depth and size of the isolation structure through ion energy, dose, and annealing parameters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional shallow trench isolation structures are used, then electrical isolation between adjacent MOS transistors is achieved, but size control is poor due to poor etching directivity

Engineering Contradiction:
Improveisolation structure size controlVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent changes the fundamental parameter of isolation structure formation from etching-based (conventional STI) to ion implantation-based. By implanting nitrogen ions for PMOS isolation and oxygen ions for NMOS isolation, the method achieves precise size control through controlled ion implantation depth and distribution, eliminating the poor directivity issues of conventional etching processes.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If liner oxide layer is formed by oxidation process, then material permeation into semiconductor substrate is prevented, but tensile or compressive stress is generated in active regions

Engineering Contradiction:
Improveisolation performanceVSAvoidstress in active regions
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The patent applies local quality by selectively implanting different ions into different isolation regions: nitrogen ions are implanted into PMOS isolation regions to generate compressive stress beneficial for hole transfer, while oxygen ions are implanted into NMOS isolation regions to generate tensile stress beneficial for electron transfer. This localized differentiation eliminates the uniform stress problem of conventional liner oxide layers.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent converts the previously harmful stress effect into a beneficial one by deliberately controlling the type and distribution of implanted ions. Instead of trying to eliminate stress, the method generates specific stresses (compressive for PMOS, tensile for NMOS) that enhance carrier transfer, turning the stress problem into a performance enhancement opportunity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Stress or pressure

If ion implantation method is used, then stress control is improved, but process complexity increases

Engineering Contradiction:
Improvestress managementVSAvoidion implantation process
Core Design Contradiction:
Stress or pressureVSDevice complexity

Solution Approach 1:

The patent segments the ion implantation process into distinct steps for different isolation regions. First, nitrogen ions are implanted into PMOS isolation regions, then oxygen ions are implanted into NMOS isolation regions. This segmentation allows independent optimization of stress characteristics for each transistor type while maintaining overall process manageability through clear process separation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the process, improves electrical properties by managing stress effectively, and enhances the isolation performance and operational stability of MOS transistors.

Implementation Method 1

implanting nitrogen ions into the PMOS isolation region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a tensile stress is generated in the PMOS isolation structure formed by implanting nitrogen ions into the PMOS isolation region due to the difference between silicon nitride (SiN) and silicon (Si) in physical properties, which causes a compressive stress in the PMOS active region, and further facilitates the migration of hole

Methodology Applied
Scientific EffectStress generation: Stress Relaxation

Implementation Method 3

implanting oxygen ions into the NMOS isolation region

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 4

a tensile stress is generated in the NMOS active region due to the difference between silicon oxide and Si in physical properties when a NMOS isolation structure is formed by implanting oxygen ions into the NMOS isolation region, which facilitates the migration of electron

Methodology Applied
Scientific EffectStress generation: Stress Relaxation

Implementation Method 5

annealing the semiconductor substrate to form isolation structures of PMOS and NMOS, respectively

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS7718506B2Isolation structure for MOS transistor and method for forming the same
Publication Date: 2010.05.18 SEMICON MFG INT (SHANGHAI) CORP
  • US7718506B2 patent drawing
  • US7718506B2 patent drawing
  • US7718506B2 patent drawing

AI summary

A method for forming isolation structure for MOS transistor is disclosed, which includes forming a first photoresist layer over a sacrificed oxide layer of a semiconductor substrate, patterning the first photoresist layer to define a PMOS active region and a PMOS isolation region; implanting nitrogen ions into the PMOS isolation region through the sacrificed oxide layer by using the first photoresist layer as a mask; removing the first photoresist layer; forming a second photoresist layer over the sacrificed oxide layer, patterning the second photoresist layer to define a NMOS active region and a NMOS isolation region; implanting oxygen ions into the NMOS isolation region through the sacrificed oxide layer by using the second photoresist layer as a mask; removing the second photoresist layer and the sacrificed oxide layer; and annealing the semiconductor substrate to form isolation structures of PMOS and NMOS, respectively.