MOS Memory Cell With Localized Contacts For Irreversible Resistivity Programming
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Solution Overview
Problem
Existing irreversible-programming memory cells have limitations in their programmability and stability, particularly in terms of resistivity changes, which are not efficiently addressed by current technologies.
Innovation Solution
The development of a MOS transistor with additional contacts on the source, drain, and gate regions allows for the irreversible increase of resistivity through the application of an electric current or voltage, enabling stable and efficient programming of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional irreversible-programming memory cells are used, then memory functionality is achieved, but resistivity changes are insufficient and programming stability is poor
Solution Approach 1:
The patent applies parameter changes by utilizing a high-current pulse (greater than twice the threshold current) to irreversibly modify the resistivity of the source or drain region. This current-induced resistivity change provides stable and controllable programming states, directly addressing the insufficient resistivity changes and poor programming stability of conventional memory cells
Solution Approach 2:
The patent employs periodic action through the application of controlled voltage pulses to the gate region. By applying voltage pulses greater than a control voltage (by 10-20%) at specific timing, the method achieves irreversible resistivity modification in a controlled manner, improving programming stability while maintaining manufacturability
2Area of stationary object
If memory cell size is reduced, then integration density increases, but maintaining stable programming becomes more difficult
Solution Approach 1:
The patent applies local quality by concentrating the programming action in specific localized regions (source or drain region) through targeted current application between two contacts. This localized approach allows the rest of the transistor structure to maintain its dimensions, enabling area reduction while preserving programming stability in the critical region
Solution Approach 2:
The patent segments the programming function by introducing separate contact points for current application, independent of the main source-drain terminals. This segmentation allows the programming current to be applied locally to specific regions without affecting the overall transistor dimensions, enabling miniaturization while maintaining reliable programming
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in stable-programming memory cells with improved resistivity changes, allowing for smaller surface area memory cells that can adapt to existing MOS transistor sizes without increasing dimensions, and provides a method for irreversible programming.
Implementation Method 1
the resistivity of the source and/or drain region is capable of being irreversibly increased by application of an electric current between two contacts of the region
Implementation Method 2
the resistivity of the gate region is further capable of being irreversibly increased by application of the electric current between two contacts of the gate region
Implementation Method 3
the resistivity of the region is capable of being increased by further application of a voltage between the contacts. According to an embodiment, the voltage is greater than a control voltage
Data Source
AI summary
An exemplary semiconductor memory includes a channel region disposed in a semiconductor body, a gate region overlying the channel region, a first and a second source/drain region disposed in the semiconductor body, where the first source/drain region is spaced from the second source/drain region by the channel region. The exemplary memory further includes a first contact electrically contacting the first source/drain region, a second contact electrically contacting the first source/drain region and spaced from the second contact, and a third contact electrically contacting the second source/drain region. The first and second contacts are configured so that a resistivity of the first source/drain region can be irreversibly increased by application of an electric current between the first and second contacts. The first contact extends over a first width, the third contact extends over a third width, where the first width is smaller than the third width.