MOS P-N Junction Diode Reverse Recovery Time Reduction

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Solution Overview

Problem

MOS P-N junction diodes have longer reverse recovery times compared to Schottky diodes, which deteriorates device performance, despite offering comparable forward turn-on voltage and lower reverse leakage current.

Innovation Solution

A method for manufacturing a MOS P-N junction diode with enhanced response speed involving a semiconductor substrate with a guard ring, gate oxide layer, polysilicon structure, central conductive layer, silicon nitride layer, metal diffusion layer, and metallic sputtering layer, formed through a series of ion implantation and thermal processes to optimize the diode's structure and reduce reverse recovery time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a P-N junction diode is used, then reverse leakage current is lower than Schottky diode, but reverse recovery time is longer

Engineering Contradiction:
Improvereverse leakage currentVSAvoidreverse recovery time
Core Design Contradiction:
Object-generated harmful factorsVSLoss of time

Solution Approach 1:

The diode is divided into multiple functional regions including a first doped region, second doped region, third doped region, and fourth doped region. This segmentation allows different regions to perform specialized functions: the first two regions form the main P-N junction with low leakage, while the third and fourth regions create a fast recovery junction that accelerates carrier recombination during reverse recovery, thus resolving the contradiction between low leakage and fast recovery time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different doped regions are created with specific local properties. The first and second doped regions have doping concentrations optimized for low reverse leakage current, while the third and fourth doped regions have doping concentrations and geometries specifically designed to reduce reverse recovery time. This local quality differentiation allows the diode to simultaneously achieve both low leakage and fast recovery characteristics.

Inventive Principle:
Principle #3Local quality

2Loss of time

If a Schottky diode is used, then reverse recovery time is short, but reverse leakage current is high

Engineering Contradiction:
Improvereverse recovery timeVSAvoidreverse leakage current
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The diode employs a composite structure combining multiple doped semiconductor regions rather than a single homogeneous material or simple Schottky barrier. This composite P-N-P-N structure integrates the advantages of different junction types, achieving both the fast recovery characteristic of Schottky diodes and the low leakage current property, thereby resolving the contradiction between short recovery time and low leakage current.

Inventive Principle:
Principle #40Composite materials

3Use of energy by moving object

If forward turn-on voltage is reduced to match Schottky diode, then reverse leakage current increases

Engineering Contradiction:
Improveforward turn-on voltageVSAvoidreverse leakage current
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The doping concentrations in different regions are carefully controlled within specific ranges (e.g., first doped region: 1×10^18 to 1×10^20 atoms/cm³, second doped region: 1×10^19 to 1×10^21 atoms/cm³). By optimizing these parameters, the diode achieves a forward turn-on voltage comparable to Schottky diodes while maintaining low reverse leakage current through the specialized multi-region structure that prevents excessive leakage even at lower voltage thresholds.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The MOS P-N junction diode achieves low reverse leakage current, low forward bias voltage, high reverse voltage tolerance, and short reverse recovery time, addressing the performance limitations of prior art diodes.

Implementation Method 1

a first ion implantation process and a thermal drive-in process are performed to form a guard ring in the semiconductor substrate

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a first ion implantation process and a thermal drive-in process are performed to form a guard ring in the semiconductor substrate

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

a diffusion treatment is performed to diffuse the material of the metallic evaporation film into the guard ring and the central conductive layer, thereby forming a metal diffusion layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 4

a metallic sputtering layer is formed on exposed surfaces of the mask layer, the polysilicon structure, the guard ring, the central conductive layer and the silicon nitride layer

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS9865700B2MOS P-N junction diode with enhanced response speed and manufacturing method thereof
Publication Date: 2018.01.09 PFC DEVICE HLDG
  • US9865700B2 patent drawing
  • US9865700B2 patent drawing
  • US9865700B2 patent drawing

AI summary

A MOS P-N junction diode includes a semiconductor substrate, a mask layer, a guard ring, a gate oxide layer, a polysilicon structure, a central conductive layer, a silicon nitride layer, a metal diffusion layer, a channel region, and a metal sputtering layer. For manufacturing the MOS P-N junction diode, a mask layer is formed on a semiconductor substrate. A gate oxide layer is formed on the semiconductor substrate, and a polysilicon structure is formed on the gate oxide layer. A guard ring, a central conductive layer and a channel region are formed in the semiconductor substrate. A silicon nitride layer is formed on the central conductive layer. A metal diffusion layer is formed within the guard ring and the central conductive layer. Afterwards, a metal sputtering layer is formed, and the mask layer is partially exposed.