Complementary MOS Transistor Structure With PN-Junction Switching

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Solution Overview

Problem

Current CMOS technologies, such as FDSOI and Z2FET transistors, face limitations in performance and functionality, particularly in low-consumption electronics and electrostatic discharge protection applications.

Innovation Solution

A microelectronic device comprising a field-effect n-MOS and p-MOS transistor with a PN junction formed by N-doped and P-doped zones, along with a dielectric layer and a rear gate, allowing for improved control and switching capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional transistors (FDSOI, Z2FET) are used, then device functionality is achieved, but energy consumption is high and performance is limited in low-consumption applications

Engineering Contradiction:

Improveenergy consumptionVSAvoidperformance in low-consumption applications

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The patent merges an n-MOS transistor and a p-MOS transistor into a single integrated device structure. The n-MOS transistor includes N-doped zones (110, 120) and the p-MOS transistor includes P-doped zones (210, 220), with the second N-doped zone (120) and second P-doped zone (220) forming a PN junction. This combination allows the device to achieve both low energy consumption and reliable performance in low-consumption applications by utilizing the complementary characteristics of both transistor types within one structure.

Inventive Principle:

Principle #5Merging (Combining)

2Speed

If current transistor structures are used, then basic switching function is provided, but switching speed and slope are insufficient for high-performance applications

Engineering Contradiction:

Improveswitching speedVSAvoidswitching performance

Core Design Contradiction:

SpeedVSProductivity

Solution Approach 1:

By integrating both n-MOS and p-MOS transistors with a shared PN junction structure, the device achieves rapid switching speeds and high slope performance. The PN junction formed between the second N-doped zone (120) and second P-doped zone (220) enables fast charge-discharge cycles, while the complementary transistor structures work together to provide sharp switching characteristics suitable for high-performance applications.

Inventive Principle:

Principle #5Merging (Combining)

3Ease of manufacture

If simple transistor structures are used, then manufacturing is easier, but device functionality and performance are limited

Engineering Contradiction:

Improvedevice fabricationVSAvoiddevice functionality

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The integrated structure combining n-MOS and p-MOS transistors with a common PN junction can be manufactured using standard CMOS fabrication processes, maintaining ease of production. The structure includes N-doped zones (110, 120) and P-doped zones (210, 220) arranged to form both transistor channels and the PN junction simultaneously, allowing enhanced functionality without requiring entirely new manufacturing techniques.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The device structure serves multiple functions within a single integrated unit: the n-MOS transistor (with N-doped zones 110, 120) provides one switching function, the p-MOS transistor (with P-doped zones 210, 220) provides another switching function, and the PN junction (between zones 120 and 220) provides additional functionality for voltage reference and temperature sensing. This multi-functionality is achieved without significantly complicating the manufacturing process.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The device achieves enhanced performance with low energy consumption, rapid switching, and improved functionality, making it suitable for various applications beyond current transistor limitations.

Implementation Method 1

The device comprises... a second N-doped zone (120) and a second P-doped zone (220) forming a PN junction (1000). It has the particularity that the second N-doped zone (120) and the second P-doped zone (220) form a PN junction (1000). The aim thus defined constitutes a microelectronic device which could replace, in numerous applications, the transistors currently used. This device can further have improved performance. Advantageously, it makes it possible to generate a sudden switching thanks to the PN junction

Methodology Applied

Scientific EffectPN junction: Diode

Implementation Method 2

a field-effect n-MOS transistor comprising a first drain, a first source, a first gate and a first gate oxide... a field-effect p-MOS transistor comprising a second drain, a second source, a second gate and a second gate oxide

Methodology Applied

Scientific EffectField-effect: Electric Field

Data Source

PatentUS12342617B2Microelectronic device with two field-effect transistors

Publication Date: 2025.06.24 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

AI summary

A microelectronic device includes a field-effect n-MOS transistor, a first N-doped zone, constituting one from among the drain and the source of the n-MOS transistor and a second N-doped zone, constituting the other from among the drain and the source of the n-MOS transistor. The device further includes a field-effect p-MOS transistor, a first P-doped zone, constituting one from among the drain and the source of the p-MOS transistor, a dielectric layer in contact with the doped zones and a rear gate. The n-MOS transistor and the p-MOS transistor are separated by a PN junction.