MOS Reference Current Circuit for Temperature-Stable Precision
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Solution Overview
Problem
Existing reference current circuits struggle to supply a stable and precise reference current across varying ambient temperatures, while also requiring a significant layout area.
Innovation Solution
A reference current circuit is designed using a current mirror circuit, paired MOS transistors, and a voltage dividing circuit to generate a stable reference current. The circuit includes an enhancement mode MOS transistor and depletion mode MOS transistors, which are paired to cancel out manufacturing variations and temperature effects, allowing for a compact layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference current circuit uses highly precise resistive elements and complex temperature compensation structures, then the precision and stability of reference current supply is improved, but the layout area increases
Solution Approach 1:
The patent changes the operating parameters of MOS transistors by applying specific gate voltages within a controlled range to exploit the temperature compensation effect. By adjusting the gate voltage parameter, the circuit achieves temperature-stable reference current without requiring complex physical structures or large layout areas.
Solution Approach 2:
The patent uses paired MOS transistors with different Fermi levels but identical channel properties to create a replicated structure that cancels out temperature effects. This copying approach with slight parameter variations achieves precision without needing additional compensation circuits or resistive elements that would increase layout area.
2Stability of the object's composition
If a reference current circuit uses paired transistors with different Fermi levels to cancel temperature effects, then the temperature stability is improved, but the device complexity increases
Solution Approach 1:
The patent achieves temperature stability by changing the electrical parameter (gate voltage) rather than modifying the physical structure. By controlling the gate voltage within a specific range, the circuit exploits the inherent temperature compensation effect of the paired transistors without adding complex control circuits or multiple transistor pairs.
Solution Approach 2:
The paired MOS transistors with different Fermi levels inherently provide temperature compensation to each other through their electrical characteristics. The circuit structure itself performs the temperature stabilization function without requiring external compensation mechanisms, control circuits, or additional components that would increase complexity.
Data Source
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Figure 3A
AI summary
A reference current circuit includes: a current mirror circuit for supplying lout based on lin; an E-mode MOS including a drain that supplies lout, a gate connected to the drain, and a grounded source; a first D-mode MOS including a gate terminal connected to the gate terminal of the E-mode MOS, and generating Vref; a voltage dividing circuit for supplying a divided voltage (Vdiv) of Vref; and a second D-mode MOS for supplying lin based on Vdiv. The E-mode MOS is the same as the first D-mode MOS in conductivity type and impurity concentration of a channel, and is different from the first D-mode MOS in Fermi level of a gate electrode. The voltage dividing circuit supplies Vdiv higher than a threshold voltage of the second D-mode MOS and lower than a cross point (X) to a gate terminal of the second D-mode MOS.