MOS Power-On Reset Circuit With Threshold-Based Low-Power Startup
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Solution Overview
Problem
Existing power-ON reset circuits in electronic devices are complex and consume excessive power and chip area, making them unsuitable for low power applications.
Innovation Solution
A power-ON reset circuit utilizing a bias current generating stage with a first current mirror and an output stage comprising MOS transistors, where the gate terminals of the second and third MOS transistors are interconnected, providing a power-ON reset signal when the supply voltage exceeds two threshold levels, optimizing power consumption and chip area by minimizing the power required for the bias current generating stage and output stage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a conventional power-ON reset circuit is used, then the reset function is provided, but the circuit consumes excessive power and occupies large chip area
Solution Approach 1:
The patent changes the operating parameters of the circuit by using MOS transistors in saturation region with specific W/L ratios to achieve ultra-low power consumption. The bias current is optimized to minimum levels while maintaining reliable reset function, and threshold voltages are carefully selected to ensure proper operation at low supply voltages
Solution Approach 2:
The circuit uses the supply voltage itself to generate the reset signal without requiring external power sources or additional bias circuits. The MOS transistors automatically switch states based on the supply voltage level, providing self-regulating power-ON reset functionality that adapts to varying supply conditions
2Area of stationary object
If a conventional power-ON reset circuit is used, then the reset function is provided, but the circuit occupies large chip area
Solution Approach 1:
The circuit is segmented into minimal functional blocks: a bias current generating stage and an output stage with MOS transistors. This segmentation eliminates unnecessary components and interconnections, reducing chip area while maintaining the complete reset function through coordinated operation of the segmented stages
Solution Approach 2:
The patent extracts and eliminates redundant components from conventional power-ON reset circuits, keeping only the essential bias current generating stage and output stage. Unnecessary transistors, resistors, and control logic are removed, achieving ultra-compact implementation with reliable reset functionality
3Reliability
If the supply voltage is monitored to provide reset signal, then the device starts operating only when voltage is sufficient, but the monitoring circuit consumes excessive power
Solution Approach 1:
The patent replaces complex active voltage monitoring circuits with a passive MOS transistor-based voltage threshold detection mechanism. The MOS transistors naturally switch at specific voltage thresholds determined by their gate-source voltages, providing accurate voltage monitoring without requiring active amplifiers or comparators that would consume excessive power
Solution Approach 2:
The circuit uses simple MOS transistors with fixed threshold voltages instead of complex, power-hungry voltage reference circuits. The threshold detection is achieved through the inherent electrical characteristics of the MOS devices, which act as disposable, low-cost voltage sensing elements that consume minimal power
Data Source
AI summary
An integrated circuit provides a power on reset signal with respect to a supply voltage level supplying the electronic device. The integrated circuit comprises a bias current generating stage having a first current mirror and an output stage having first, second and third series connected MOS transistors. A connection between the second MOS transistor and the third MOS transistor forms a POR output node. A gate of the second MOS transistor and a gate of the third MOS transistor are coupled to each other and to the first current mirror. This allows a current through the third MOS transistor when the supply voltage is higher than a first MOS transistor threshold and a current through the second MOS transistor only when the supply voltage is greater than or equal to the sum of the first MOS transistor threshold and a second MOS transistor threshold voltage.