MOS Resistor Feedback Circuit for Constant R(DS) Stability
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Solution Overview
Problem
Integrated electronic circuits face challenges in implementing accurate and cost-effective resistors, as large polysilicon resistors occupy significant wafer area, and MOS resistors operating in the linear region have resistance that varies with gate voltage and drain-to-source voltage, making them non-constant and sensitive to temperature and process variations.
Innovation Solution
A MOS resistor design that averages gate-to-terminal voltages to maintain a constant resistance by applying the averaged voltage to the MOS transistor gate, using compensation resistors and negative feedback structures to stabilize resistance against temperature and process variations, and employing multi-segmented MOS resistors with voltage wells to reduce leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a length of doped polysilicon is deposited to form a resistor, then the resistor is temperature stable with low process variation, but the resistor occupies a large wafer area
Solution Approach 1:
The patent segments the MOS transistor channel into multiple identical segments connected in parallel. Each segment contributes to the overall resistance, allowing the total resistance to be achieved with a much smaller physical area compared to a single large polysilicon resistor. The segmented structure maintains temperature stability while reducing the occupied wafer area from 100,000 μm² to a significantly smaller footprint.
2Area of stationary object
If a MOS transistor operates in the linear region to form a resistor, then the resistor occupies smaller area, but the resistance varies with gate voltage and drain-to-source voltage
Solution Approach 1:
The patent employs feedback mechanisms where the gate voltage is dynamically adjusted based on the drain-to-source voltage to maintain constant resistance. By using feedback control, the MOS resistor compensates for voltage variations, ensuring that the resistance remains stable despite changes in operating conditions, thus resolving the non-constant resistance issue while maintaining small area occupation.
Solution Approach 2:
The patent makes the gate voltage dynamic rather than fixed, allowing it to adjust in response to changes in drain-to-source voltage. This dynamic adjustment ensures that the MOS transistor operates in a manner that maintains constant resistance, transforming the static resistance problem into a dynamically controlled solution that preserves both small area and resistance stability.
3Stability of the object's composition
If MOS resistor terminals are averaged and applied to the gate to maintain constant resistance, then the resistance becomes substantially constant, but the circuit complexity increases
Solution Approach 1:
The patent segments the MOS transistor into multiple identical units with symmetric terminal connections. By averaging the voltages at corresponding terminals of segmented transistors and applying this average to the gates, the circuit maintains constant resistance through a systematic approach that, while adding some complexity, provides a scalable and structured solution rather than a single complex feedback circuit.
Data Source
AI summary
Apparatus and methods disclosed herein implement a MOS resistor using the current channel of a MOS transistor. The MOS resistance R(DS) is dependent upon MOS transistor geometry and nominal gate voltage. MOS resistor terminal-to-gate voltages are averaged and applied to the MOS transistor gate such as to maintain the MOS resistor terminal voltage to current ratio, resulting in a substantially constant R(DS). R(DS) is also compensated for temperature and process variations by adjusting gate voltages via negative feedback methods.