MOS Reverse Current Protection Using an Integrated Schottky Path
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Solution Overview
Problem
The operation of metal-oxide-semiconductor (MOS) transistors in high-voltage applications is challenged by the generation of reverse current during transitions from the 'on' to the 'off' state due to stored magnetic energy in inductive loads, leading to parasitic bipolar junction transistor activation and potential thermal damage.
Innovation Solution
Integration of a Schottky diode or PN diode in series with the n-type body layer below the transistor to alter the path of reverse current, preventing parasitic PNP transistor activation by increasing impedance and directing current through an alternate circuit loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If MOS transistor is used in high-voltage applications, then high breakdown voltage and low on-resistance are achieved, but reverse current activates parasitic PNP transistor causing thermal damage
Solution Approach 1:
A diode is introduced as an intermediary component between the inductive load and the MOS transistor. This diode conducts during the reverse current phase, providing a safe discharge path for the inductive load's stored energy and preventing the reverse current from activating the parasitic PNP transistor in the MOS device.
Solution Approach 2:
The reverse current, which is harmful to the MOS transistor, is converted into a beneficial effect by channeling it through the diode. The diode's forward conduction during the reverse phase safely dissipates the inductive energy that would otherwise damage the MOS transistor, transforming a potentially destructive current into a controlled protective mechanism.
2Productivity
If transistor size is reduced to improve integration density, then more components fit on chip, but maintaining performance becomes more difficult
Solution Approach 1:
The diode acts as a protective intermediary that enables the use of smaller MOS transistors with lower on-resistance values. By protecting against reverse current damage, the diode allows designers to scale down transistor dimensions for higher integration density while maintaining reliable operation.
Solution Approach 2:
The diode provides beforehand protection against reverse current by being positioned in the circuit to catch and dissipate inductive energy before it can reach the MOS transistor. This pre-emptive protection enables more aggressive scaling of transistor sizes without compromising reliability.
3Reliability
If reverse current protection is added, then transistor integrity is preserved, but circuit complexity increases
Solution Approach 1:
A single diode serves as a simple intermediary component that provides comprehensive reverse current protection. This minimal addition protects the MOS transistor without requiring complex protection circuits, maintaining circuit simplicity while ensuring transistor integrity.
Solution Approach 2:
The diode provides self-service protection by automatically conducting during reverse current conditions without requiring external control signals or complex logic. The component inherently protects the MOS transistor through its passive electrical characteristics, simplifying the overall circuit design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces risks of leakage currents and thermal damage, preserving transistor integrity by mitigating parasitic PNP transistor activation and maintaining circuit functionality.
Implementation Method 1
Integration of a Schottky diode or PN diode in series with the n-type body layer below the transistor to alter the path of reverse current
Data Source
AI summary
A semiconductor device includes an n-type buried layer, a first N-well region, a p-type body region, a first source/drain region, a second source/drain region, a gate structure, a second N-well region, and a first silicide region. The n-type buried layer in a substrate. The first N-well region is over the n-type buried layer. The p-type body region abuts the first N-well region. The first source/drain region is in the first N-well region. The second source/drain region is in the p-type body region. The gate structure extends across a boundary of the first N-well region and the p-type body region. The second N-well region is over the n-type buried layer. The first silicide region forms a Schottky contact with the second N-well region.