MOS Transistor Spacer Formation for Ion Implantation Blocking
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Solution Overview
Problem
In the manufacturing of metal oxide semiconductor transistors, the conventional process for forming compensation spacers results in an insufficient height and width, leading to incomplete ion implantation blocking, causing performance deterioration and process window shifts due to over-etching during the etch-back process.
Innovation Solution
A method involving the formation of a gate stack structure and a hardmask layer on a substrate, followed by the sequential creation of first and second spacers, where the photoresist layer is controlled to be higher than the gate stack structure, allowing the second spacer to be formed with a sufficient height to effectively block ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If an etch-back process is performed to form a compensation spacer on the sidewall of the gate structure, then the spacer is formed to compensate for dimensional variations, but the over-etching reduces the height and width of the spacer below the required dimensions
Solution Approach 1:
A photoresist layer is formed on the spacer before the etch-back process, with its top surface higher than the top surface of the gate structure. This preliminary protective action ensures that during etching, the photoresist layer prevents over-etching of the spacer, maintaining the spacer's height above the gate structure top surface and preserving its ion implantation blocking capability
Solution Approach 2:
The photoresist layer serves as an intermediary protective layer between the etching process and the spacer. It is selectively removed after the etch-back process, having fulfilled its protective function during etching while not interfering with the final spacer dimensions or the ion implantation process
2Ease of manufacture
If the spacer height is reduced due to over-etching, then the etch-back process can be completed, but the spacer width and height are insufficient to block ion implantation effectively
Solution Approach 1:
The photoresist layer is applied to the spacer before etching as a preliminary protective measure. This allows the etch-back process to proceed to completion while the photoresist layer prevents excessive removal of spacer material, ensuring the final spacer dimensions meet the requirements for effective ion implantation blocking
Data Source
AI summary
A method for manufacturing a MOS transistor includes following. A gate stack structure and a hardmask layer on the gate stack structure are sequentially formed on a substrate. A first spacer is formed on sidewalls of the gate stack structure and the hardmask layer. A photoresist layer is formed on a sidewall of the first spacer. A top surface of the photoresist layer is higher than a top surface of the gate stack structure. The hardmask layer and a portion of the first spacer are removed to expose the top surface of the gate stack structure. A top surface of a remaining first spacer is higher than the top surface of the gate stack structure. The photoresist layer is removed. A second spacer is formed on a sidewall of the remaining first spacer. A top surface of the second spacer is higher than the top surface of the gate stack.