MOS Test Structure With Isolated Via For Epitaxial Layer Testing
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Solution Overview
Problem
Existing MOS test structures fail to independently test the epitaxial layer and substrate without interference from the doping well and doping region, and require significant additional area for specialized heavily doped wells.
Innovation Solution
A MOS test structure is designed with a substrate, scribe line region, epitaxial layer, doping well, and doping region, where a conductive material fills a test via that penetrates through these layers, with isolation covering the inner walls to electrically connect the epitaxial layer and substrate, allowing for independent testing without interference from the doping region and well.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an additional heavily doped well is designed to obtain data of the epitaxial layer and substrate without interference, then the test independence is improved, but the device area occupied increases considerably
Solution Approach 1:
The test structure is segmented into distinct functional regions: a test region with the trench gate and test via for independent epitaxial layer and substrate testing, and a separate heavily doped well region for reference measurements. This spatial segmentation allows independent testing without requiring the additional heavily doped well to be electrically connected to the active device region, thereby reducing area occupation while maintaining test independence.
Solution Approach 2:
An isolation structure (such as a deep trench filled with insulating material) is introduced as an intermediary between the test region and the heavily doped well region. This isolation structure acts as a mediator that electrically decouples the two regions, allowing the test via to independently access the epitaxial layer and substrate without signal interference from the doping well and doping region, while enabling compact layout through controlled electrical separation.
2Device complexity
If the wafer acceptance test is directly carried out on the outmost doping well layer and substrate, then the testing process is simplified, but the test results are interfered with by the doping well and doping region
Solution Approach 1:
The test structure segments the measurement path into two independent channels: one channel through the doping well and doping region for device characterization, and another channel through the test via that bypasses these doped regions to directly access the epitaxial layer and substrate. This segmentation allows simultaneous independent testing of different layers without cross-interference, maintaining process simplicity while ensuring measurement accuracy.
Solution Approach 2:
The test via structure extracts the measurement function from the conventional doping well-based test structure. By creating a dedicated test via that penetrates through the isolation structure to directly contact the epitaxial layer and substrate, the harmful influence of the doping well and doping region is completely eliminated from the measurement path, while the rest of the device structure remains unchanged.
3Adaptability or versatility
If a test structure with additional heavily doped well is used to test epitaxial layer and substrate, then test capability is improved, but manufacturing complexity increases
Solution Approach 1:
The test via structure serves multiple functions: it provides independent access to the epitaxial layer and substrate for separate testing, acts as a reference structure for process monitoring, and can be used for both electrical and physical characterization. This multi-functionality is achieved within the existing manufacturing process framework without requiring additional heavily doped wells or complex process modifications, thereby improving test capability while maintaining manufacturing simplicity.
Data Source
AI summary
A MOS test structure is disclosed. A scribe line region is disposed on a substrate which has a first side and a second side opposite to the first side. An epitaxial layer is disposed on the first side, the doping well is disposed on the epitaxial layer and the doping region is disposed on the doping well. A trench gate of a first depth is disposed in the doping region, in the doping well and in the scribe line region. A conductive material fills the test via which has a second depth and an isolation covering the inner wall of the test via and is disposed in the doping region, in the doping well, in the epitaxial layer and in the scribe line region, to electrically connect to the epitaxial layer so that the test via is capable of testing the epitaxial layer and the substrate together.