Resistive-Feedback MOS Transconductor for Low Noise Linearity

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Solution Overview

Problem

Conventional transconductors suffer from non-linearity and high noise, which are not effectively addressed by existing technologies, leading to suboptimal performance in applications requiring high linearity and low noise.

Innovation Solution

The implementation of a resistive-feedback low-noise amplifier architecture using MOS devices with degeneration resistors and bleeder current sources, which improves linearity and noise cancellation by converting noise into common-mode noise and eliminating the need for inductors and biasing transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional transconductor designs are used, then device simplicity is maintained, but linearity deteriorates and noise increases

Engineering Contradiction:
ImprovelinearityVSAvoidnoise
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The transconductor is divided into differential pairs (first and second transconductance circuits) with separate biasing paths. Each differential pair processes one phase of the differential signal, allowing independent optimization of linearity and noise characteristics for each segment while maintaining overall system performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Inductors are introduced as intermediary elements between the differential pairs and the output. These inductors serve multiple functions: they provide impedance transformation, enable noise cancellation through magnetic coupling, and maintain voltage swing while isolating the noisy biasing networks from the signal path.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If noise cancellation techniques are implemented, then noise figure improves, but device complexity increases

Engineering Contradiction:
ImprovenoiseVSAvoidcircuit architecture
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The biasing resistors, which inherently generate thermal noise, are configured to produce common-mode noise that is converted into differential-mode noise through the inductor coupling. This converted noise is then cancelled by the differential output structure, effectively transforming a harmful noise source into a beneficial noise cancellation mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Multiple functions are merged into the inductor elements: they serve as impedance transformation elements, noise cancellation mechanisms, and biasing network isolators simultaneously. This consolidation achieves noise figure improvement without proportionally increasing device complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If inductors are used for biasing, then current biasing efficiency improves, but area consumption increases

Engineering Contradiction:
Improvecurrent biasing efficiencyVSAvoidcircuit area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The inductors are designed to perform multiple functions within a single component: they provide current biasing, enable noise cancellation, and maintain voltage swing. This multi-functionality achieves efficient current biasing without requiring separate dedicated components for each function, thereby limiting area consumption growth.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10951176B2Highly linear low noise transconductor
Publication Date: 2021.03.16 MAXLINEAR INC
  • US10951176B2 patent drawing
  • US10951176B2 patent drawing
  • US10951176B2 patent drawing

AI summary

A transconductance circuit comprises a first transistor, a second transistor, a first source-degeneration device, a second source-degeneration device, a first feedback device, and a second feedback device. The gate node of the first transistor is coupled to a source node of the second transistor via the first feedback device. The gate node of the second transistor is coupled to a source node of the second transistor via the second feedback device. The source node of the first transistor is coupled to a reference voltage via the first source-degeneration device. The source node of the second transistor is coupled to the reference voltage via the second source-degeneration device.