Power MOS Transistor Avalanche Current Management
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Solution Overview
Problem
Transistor power switch devices face challenges with avalanche breakdown due to unclamped inductive switching, leading to excessive current flow and potential device destruction, especially when subjected to repetitive voltage transients.
Innovation Solution
The introduction of a transistor power switch device design that incorporates additional PSD contacts and a reverse-biased avalanche diode in parallel with the MOSFETs to manage and dissipate avalanche current, reducing the activation of parasitic bipolar transistors and minimizing heat generation through optimized current path and thermal management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor power switch device operates with fast switching speeds, then the productivity is improved, but the reliability deteriorates due to avalanche breakdown and excessive current flow
Solution Approach 1:
A lightly-doped p-type region is introduced as an intermediary structure between the n-type drain region and the p-type body region. This intermediate layer acts as a buffer that moderates the electric field distribution during switching transitions, preventing direct high-stress interaction between the drain and body regions that would otherwise cause avalanche breakdown.
Solution Approach 2:
The doping concentration of the p-type body region is reduced in the area adjacent to the n-type drain region, creating a lightly-doped zone. This parameter change modifies the electric field characteristics and breakdown voltage profile, allowing the device to withstand higher voltage transients without entering avalanche breakdown, thereby improving reliability while maintaining fast switching performance.
2Reliability
If additional PSD contacts are added to manage avalanche current, then the reliability is improved, but the device complexity increases
Solution Approach 1:
The p-type body region serves multiple functions simultaneously: it acts as the standard body region for MOSFET operation, provides avalanche breakdown protection through its lightly-doped zone, and functions as a current collection region for avalanche current via the PSD contacts. This multi-functionality allows reliable avalanche current management without adding separate dedicated structures, thereby limiting the increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances the device's robustness to repetitive unclamped inductive switching current pulses, improving its ability to withstand high avalanche currents without failure, with a demonstrated improvement of a factor of ten in UIS robustness compared to similar devices without these features.
Implementation Method 1
Avalanche breakdown is a phenomenon that can occur in both insulating and semiconducting materials. It is a form of electric current multiplication that can allow very large currents to flow within materials which are otherwise good insulators when the electric field in the material is great enough to accelerate free electrons to the point that, when the electrons strike atoms in the material, they can knock other electrons free.
Implementation Method 2
A heavy body etch is utilized in larger transistor cells to reduce the pinched-base resistance. This etch removes silicon in the mesa region, which is then replaced with lower-impedance aluminum.
Data Source
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AI summary
A transistor power switch device (400, 700) comprising a semiconductor body (101 ) presenting opposite first and second faces (104, 106), the switch device comprising an array of vertical field-effect transistor elements (108) for carrying current between the first and second faces (104, 106), the array of transistor elements (108) comprising at the first face (104) an array of source regions (114) of a first semiconductor type, at least one body region (122, 124, 126) of a second semiconductor type opposite to the first type interposed between the source regions (114) and the second face (106), and at least one control electrode (116) for switchably controlling flow of the current through the second transistor region (122, 124, 126), and a conductive layer (1 10) contacting the source regions (114) and insulated from the control electrode (116) by at least one insulating layer (120, 121 ). The source region (114) of each of the vertical transistor elements (108) contacting the conductive layer (1 10) comprises a plurality of arms extending radially at the first face (104) towards an arm of a source region (114) of an adjacent vertical transistor element (108) of the array, the at least one body region (122, 124, 126) extending around and under the arms of the source regions (114) and extending up within each of the source regions to contact the conductive layer (110) at the first face (104) at a contact position (402) adjacent an end of each of the arms of the source regions (114).