MOS Transistor Back Gate Region Impurity Concentration
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Solution Overview
Problem
Conventional semiconductor devices face challenges in maintaining high punch-through breakdown voltage between drain and source regions due to fluctuations in impurity concentration, mask misalignment issues, and increased manufacturing complexity, which affect threshold voltage and on-resistance of MOS transistors.
Innovation Solution
A semiconductor device structure featuring a first diffusion layer of one conductivity type with a deeper impurity concentration peak for the back gate region, and a gate electrode composed of a polysilicon film and a tungsten silicon film, where the tungsten silicon film is thicker, allowing for self-aligned formation of the back gate region and improved impurity concentration, thereby enhancing punch-through breakdown voltage and reducing threshold voltage and on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an N type diffusion region is formed in a deep portion of the N type well region to prevent reduction in punch-through breakdown voltage, then the punch-through breakdown voltage is improved, but the impurity concentration in the channel region fluctuates causing threshold voltage to change
Solution Approach 1:
The invention divides the diffusion region into two distinct parts: an N type diffusion region (first conductivity type) and a back gate region (second conductivity type). The N type diffusion region is positioned apart from the channel region to prevent impurity concentration fluctuations in the channel, while the back gate region is positioned in the deep portion to maintain punch-through breakdown voltage. This segmentation allows each region to perform its specific function without interfering with the other, resolving the contradiction between maintaining breakdown voltage and preserving threshold voltage stability.
2Manufacturing precision
If the impurity concentration of the channel region is increased to reduce threshold voltage and on-resistance, then threshold voltage and on-resistance are reduced, but the punch-through breakdown voltage between drain and source regions is reduced
Solution Approach 1:
The invention segments the deep portion region into two functional areas: the N type diffusion region positioned away from the channel to avoid affecting channel impurity concentration, and the back gate region positioned in the deep portion to provide the necessary impurity concentration for maintaining punch-through breakdown voltage. This allows the channel region impurity concentration to be optimized for low threshold voltage and on-resistance without compromising breakdown voltage.
3Manufacturing precision
If mask misalignment occurs at the time of forming the N type diffusion region or source and drain regions, then the N type diffusion region is formed apart from the desired region, but the punch-through breakdown voltage is reduced and breakdown voltage characteristic is deteriorated
Solution Approach 1:
The invention segments the diffusion process into two separate steps: first forming the N type diffusion region, then forming the back gate region. This segmentation allows each region to be formed with independent positioning control, reducing the impact of mask misalignment. Even if misalignment occurs, the back gate region can be positioned in the deep portion to maintain breakdown voltage characteristics.
4Reliability
If the N type diffusion region is formed to prevent punch-through breakdown voltage reduction, then the breakdown voltage is improved, but the number of manufacturing steps and masks increase
Solution Approach 1:
The invention segments the diffusion region formation into two steps using two different conductivity types of impurities. This segmentation allows for more precise control of impurity concentration distribution, enabling the achievement of appropriate threshold voltage, low on-resistance, and high breakdown voltage simultaneously, which may offset the increased manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure effectively increases the impurity concentration near the deep portion of the source region, improving punch-through breakdown voltage, achieving appropriate threshold voltage, reducing on-resistance, and minimizing device size while simplifying the manufacturing process and reducing costs.
Implementation Method 1
a first diffusion layer of one conductivity type is formed in the semiconductor layer so as to extend across regions where a drain region and a back gate region are formed, and a second diffusion layer of the one conductivity type constituting the source region is formed in the semiconductor layer
Implementation Method 2
a gate oxide film is formed on the semiconductor layer
Data Source
AI summary
A conventional semiconductor device has a problem that it is difficult to obtain a desired breakdown voltage characteristic due to a reduction in a punch-through breakdown voltage between drain and source regions. In a semiconductor device according to the present invention, a P type diffusion layer is formed in an N type epitaxial layer. An N type diffusion layer as a back gate region is formed in the P type diffusion layer. The N type diffusion layer is formed by self-alignment using a drain electrode. This structure makes it possible to increase an impurity concentration of the N type diffusion layer in a vicinity of a P type diffusion layer as a source region. As a result, it is possible to improve a punch-through breakdown voltage between the drain and the source regions, and to achieve a desired breakdown voltage characteristic of the MOS transistor.