MOS Transistor Combined-Source Structure Low Power

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Solution Overview

Problem

Conventional MOSFETs face increased off-state leakage current and power consumption due to short channel effects and subthreshold slope limitations as feature sizes shrink, while Schottky barrier and tunneling field effect transistors suffer from low on-state currents and leakage issues.

Innovation Solution

A MOS transistor with a combined-source structure incorporating a Schottky junction and a T-shaped gate, where the highly-doped source region is connected to a Schottky source region and the control gate extends to form a T-shape, enhancing band-to-band tunneling and reducing parasitic resistance through precise gate width control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the device size is continuously shrunk to enter the nano scale, then the integration density is improved, but the off-state leakage current increases due to short channel effects

Engineering Contradiction:
Improvedevice sizeVSAvoidoff-state leakage current
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The source region is divided into two distinct parts: a highly-doped source region and a Schottky source region. This segmentation allows the highly-doped source to provide strong carrier supply while the Schottky junction provides low off-state leakage, resolving the contradiction between miniaturization and leakage control

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The source structure combines highly-doped semiconductor material with metal or metal silicide to form a Schottky junction. This composite structure leverages the high carrier concentration of heavily-doped semiconductor and the low barrier height of metal-semiconductor junction to simultaneously achieve high on-state current and low off-state leakage

Inventive Principle:
Principle #40Composite materials

2Reliability

If the threshold voltage is reduced to improve device performance, then the switching capability is improved, but the power consumption increases

Engineering Contradiction:
Improveswitching capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The gate is segmented into a main gate and an extending gate, where the extending gate specifically controls the Schottky junction region. This allows independent optimization of threshold voltage for switching capability while the Schottky barrier provides inherent low leakage to reduce power consumption

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The Schottky barrier height is engineered to provide optimal balance between turn-on current and off-state leakage. By controlling the metal-semiconductor interface properties, the device achieves low threshold voltage for good switching while maintaining low subthreshold leakage to reduce power consumption

Inventive Principle:
Principle #35Parameter changes

3Power

If a Schottky barrier MOSFET structure is used to reduce source/drain parasitic resistance, then the on-state current is improved, but the off-state leakage current increases

Engineering Contradiction:
Improveon-state currentVSAvoidoff-state leakage current
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The source is divided into highly-doped source region and Schottky source region, where each performs a different function: the highly-doped region provides low resistance for high on-state current, while the Schottky junction provides low off-state leakage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges the advantages of highly-doped source (low resistance) and Schottky junction (low leakage) into a unified combined-source structure, achieving both high on-state current and low off-state leakage simultaneously

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If a tunneling field effect transistor is used to achieve band-to-band tunneling, then the subthreshold slope is improved, but the on-state current is limited by tunneling probability

Engineering Contradiction:
Improvesubthreshold slopeVSAvoidon-state current
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The source is segmented into highly-doped source region providing high carrier concentration and Schottky source region providing tunneling mechanism. This segmentation enables both steep subthreshold slope from tunneling and high on-state current from high carrier supply

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The combined-source structure uses composite material properties: highly-doped semiconductor for carrier supply and metal-semiconductor Schottky junction for tunneling. This composite approach overcomes the on-state current limitation of pure TFET while maintaining steep subthreshold slope

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly improves turn-on current, reduces leakage current, and achieves a steeper subthreshold slope, compatible with conventional CMOS processes, making it suitable for low power consumption devices.

Implementation Method 1

a turn-on of the transistor is achieved by a direct barrier tunneling of carriers at the source terminal

Methodology Applied
Scientific EffectBarrier tunneling:

Implementation Method 2

a Schottky junction (a metal-semiconductor junction) is formed between the Schottky source region and the channel under the extending gate

Methodology Applied
Scientific EffectSchottky junction:

Implementation Method 3

The TFET achieves a turn-on by controlling a band-to-band tunneling of a reverse-biased PIN junction through a gate

Methodology Applied
Scientific EffectBand-to-band tunneling:

Data Source

PatentUS8710557B2MOS transistor having combined-source structure with low power consumption and method for fabricating the same
Publication Date: 2014.04.29 SEMICON MFG INT (SHANGHAI) CORP
  • US8710557B2 patent drawing
  • US8710557B2 patent drawing
  • US8710557B2 patent drawing

AI summary

The present invention discloses a MOS transistor having a combined-source structure with low power consumption, which relates to a field of field effect transistor logic devices and circuits in CMOS ultra-large-scaled integrated circuits. The MOS transistor includes a control gate electrode layer, a gate dielectric layer, a semiconductor substrate, a Schottky source region, a highly-doped source region and a highly-doped drain region. An end of the control gate extends to the highly-doped source region to form a T shape, wherein the extending region of the control gate is an extending gate and the remaining region of the control gate is a main gate. The active region covered by the extending gate is a channel region, and material thereof is the substrate material. A Schottky junction is formed between the Schottky source region and the channel under the extending gate. The combined-source structure according to the invention combines a Schottky barrier and a T-shaped gate, improves the performance of the device, and the fabrication method thereof is simple. Thus, a higher turn-on current, a lower leakage current, and a steeper subthreshold slope can be obtained, and the present application can be applied in the field of low power consumption and have a higher practical value.