MOS Transistor Gate Positioning to Minimize Offset Voltage
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Solution Overview
Problem
MOS transistors in semiconductor devices often exhibit non-uniform electrical and physical parameters due to variations in fabrication processes, leading to offset voltages in electronic devices like operational amplifiers, which can result in malfunction and decreased yield, and the chopping technique used to address this issue degrades integration density.
Innovation Solution
The design of MOS transistors with gate electrodes disposed only over active regions without overlapping with isolation regions, along with the inclusion of blocking regions of opposite conductivity type, helps minimize offset values by isolating the step differences between active and isolation layers, thereby maintaining uniform characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate electrode overlaps with the isolation region, then the fabrication process is simpler, but the threshold voltage becomes non-uniform due to step differences between active and isolation layers
Solution Approach 1:
The gate electrode is extracted from overlapping the isolation region and positioned only over the active region. This removes the gate electrode from the harmful step difference zone between the active layer and isolation layer, eliminating the cause of non-uniform threshold voltage while maintaining fabrication simplicity
Solution Approach 2:
The blocking region is introduced as an intermediary structure between the gate electrode and the isolation region. It provides a transition zone that prevents direct contact between the gate electrode and the step difference, thereby maintaining uniform threshold voltage without complicating the fabrication process
2Reliability
If additional MOS transistors are added to form a chopping circuit, then the offset voltage is removed, but the integration density is degraded
Solution Approach 1:
The step difference between active and isolation layers, which originally caused non-uniform threshold voltage and offset voltage, is converted into a beneficial feature. By positioning the gate electrode to overlap with the blocking region that utilizes this step difference, the harmful step difference becomes part of the solution that eliminates offset voltage without requiring additional chopping circuits
Solution Approach 2:
The threshold voltage parameter is made uniform across all MOS transistors by controlling the gate electrode position and the blocking region characteristics. This parameter control eliminates the need for chopping circuits while maintaining high integration density
Data Source
AI summary
A MOS transistor includes a gate electrode disposed over an active region without overlapping with an isolation region, the active region including a channel region, the isolation region defining the active region, a source region and a drain region disposed in first and second portions of the active region, respectively, the first and second portions being disposed at first and second sides of the gate electrode, respectively, the first side opposing the second side, a first blocking region disposed in a third portion of the active region between a third side of the gate electrode and the isolation region and between the source and the drain region, and a second blocking region disposed in a fourth portion of the active region between a fourth side of the gate electrode and the isolation region and between the source and the drain region, the fourth side opposing the third side.