MOS Transistor Stair Gate Structure for Ion/Ioff Ratio

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Solution Overview

Problem

Modifying the electrical characteristics of MOS transistors, such as threshold voltage and Ion/Ioff ratio, is complex and economically costly, especially when altering the doping of drain and source regions, requiring new masks and increased volume.

Innovation Solution

Introducing a stair structure at the foot of the gate that extends the entire width of the active zone, allowing for modification of electrical characteristics without changing the existing doping masks or increasing volume, by forming a gate region with a central zone and additional etching steps to create stairs that modify the doping profile.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the doping of drain and source regions is modified to change electrical characteristics, then the threshold voltage and Ion/Ioff ratio can be adjusted, but the process becomes complex and economically costly requiring new masks and increased volume

Engineering Contradiction:
Improveelectrical characteristics modificationVSAvoidfabrication process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a vertical dimension by creating stairs at the foot of the gate, extending into the substrate. This vertical structure modification allows electrical characteristic adjustment without changing the horizontal doping masks, thus resolving the contradiction between adaptability and complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stairs are positioned locally at the foot of the gate region, specifically where needed to modify the doping profile. This localized modification achieves the desired electrical characteristic changes without requiring global process changes, maintaining simplicity while providing adaptability

Inventive Principle:
Principle #3Local quality

2Reliability

If new doping masks are created to modify electrical characteristics, then the transistor performance can be optimized, but the manufacturing cost and process complexity increase

Engineering Contradiction:
Improvetransistor performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The stairs are formed during the gate formation process itself, before the doping steps. This preliminary action allows the subsequent doping to be performed using existing masks, achieving performance optimization without requiring new masks or increasing manufacturing cost

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate structure with stairs serves multiple functions: it defines the gate region, creates the desired doping profile, and modifies electrical characteristics all in one structure. This multi-functionality eliminates the need for additional masks or processes, maintaining ease of manufacture while improving reliability

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If the gate structure is modified to add stairs, then electrical parameters can be uniformly modified, but the fabrication process becomes more complex

Engineering Contradiction:
Improveelectrical parameter uniformityVSAvoidgate structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The gate foot is segmented into multiple stairs of different heights, where each stair can be independently controlled. This segmentation allows precise control over the doping profile and electrical parameters, achieving uniformity while the modular nature keeps fabrication manageable

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11270886B2Transistor comprising a lengthened gate
Publication Date: 2022.03.08 STMICROELECTRONICS (ROUSSET) SAS
  • US11270886B2 patent drawing
  • US11270886B2 patent drawing
  • US11270886B2 patent drawing

AI summary

A MOS transistor is produced on and in an active zone and included a source region and a drain region. The active zone has a width measured transversely to a source-drain direction. A conductive gate region of the MOS transistor includes a central zone and, at a foot of the central zone, at least one stair that extends beyond the central zone along at least an entirety of the width of the active zone.