Power MOS Transistor Terminal Region Breakdown Voltage
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Solution Overview
Problem
In semiconductor devices with a superjunction structure, uneven charge balance between the p-type column region and the p-type guard ring region can lead to a decrease in breakdown voltage, particularly in the terminal region, making them susceptible to breakdown when surge voltages are applied.
Innovation Solution
The semiconductor device incorporates a design where the p-type column regions are spaced apart from the p-type guard ring region, with the guard ring region surrounding the outer periphery of the base region, and the trench widths are optimized to prevent overlap, ensuring uniform charge balance and depletion layer formation, thereby enhancing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the p-type column region and p-type guard ring region are overlapped to form a superjunction structure, then the breakdown voltage in the element formation region is improved, but the breakdown voltage in the terminal region decreases due to uneven charge balance
Solution Approach 1:
The invention divides the terminal region into two separate functional zones: a guard ring region surrounding the base region and a column region in the outermost periphery. By segmenting these regions and preventing their overlap, the patent eliminates the charge balance unevenness that occurs when they are combined, thereby maintaining uniform breakdown voltage across different regions.
Solution Approach 2:
The patent applies different structural configurations to different regions: the guard ring region is formed with a first concentration of impurities to provide electrostatic control, while the column region in the outermost periphery is formed with a second concentration of impurities at a different depth. This local differentiation ensures optimal performance in each region without the harmful effects of overlap.
2Device complexity
If the column region is placed in the outermost periphery overlapping with the guard ring region, then the device structure is compact, but electric field concentration occurs leading to reduced breakdown voltage
Solution Approach 1:
The invention extracts the column region from the overlapping zone with the guard ring region and places it in the outermost periphery at a different depth. This separation removes the source of electric field concentration that occurs at the overlap interface, thereby preventing breakdown voltage reduction while maintaining a compact overall structure.
3Ease of manufacture
If the guard ring region and column region are formed with overlapping depths, then the manufacturing process is simplified, but charge balance becomes uneven reducing terminal region breakdown voltage
Solution Approach 1:
The patent performs preliminary depth differentiation during the formation process: the guard ring region is formed first with a specific depth and impurity concentration, then the column region is formed subsequently in the outermost periphery with a different depth and impurity concentration. This preliminary action ensures proper charge balance is achieved without requiring complex post-processing adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively increases the breakdown voltage in the terminal region, ensuring reliable operation even under surge conditions by maintaining uniform depletion layer formation and preventing electric field concentration.
Implementation Method 1
the p-type column regions and the n-type drift regions are formed, for example, to be placed alternately in one direction. This structure is called a superjunction structure
Implementation Method 2
an n-channel power MOS transistor is formed, as an switching element, in an element formation region defined in a semiconductor substrate. In the element formation region, a p-type base region, in which a channel is formed, is formed
Data Source
AI summary
An n-channel power MOS transistor having a gate electrode is formed in an element formation region defined in a semiconductor substrate. A p-type guard ring region is formed in a terminal region. A plurality of p-type column regions are formed from the bottom of the p-type base region to a further deeper position. The column region located in the outermost periphery and the p−-type guard ring region are spaced apart from each other by a distance. A gate electrode lead-out portion electrically coupled to the gate electrode is formed in the p−-type guard ring region.