MOS Bias Control Using Trap Preconditioning for RTS Noise
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Solution Overview
Problem
Semiconductor devices, particularly MOS transistors, suffer from random telegraph signalling (RTS) noise due to traps in the semiconductor material, which increases noise contribution and affects threshold voltage and conductivity, especially in smaller gate area devices with smaller process node geometries.
Innovation Solution
A circuit comprising a MOS device and a bias controller that applies a pre-bias to set the occupancy state of charge carrier traps, reducing noise by selectively varying parameters such as bias voltage magnitude, duration, and waveform based on operating conditions like temperature and noise levels, to mitigate RTS noise during operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOS transistors with smaller gate areas and smaller process node geometries are used, then device integration density and processing capability are improved, but RTS noise increases due to greater impact of trapped charge
Solution Approach 1:
The patent applies a pre-bias voltage to the MOS device before it enters the active state to deliberately set the occupancy state of charge carrier traps. This preliminary action ensures that traps are in a known state (either filled or empty) before the device operates, preventing random trap transitions during signal processing and thereby reducing RTS noise while allowing the use of smaller process nodes
Solution Approach 2:
The patent dynamically adjusts the pre-bias voltage parameter based on operating conditions such as temperature and circuit state. By changing the pre-bias voltage magnitude and duration, the system optimizes trap occupancy control for different operating scenarios, maintaining low RTS noise across varying conditions while preserving the benefits of small process node geometries
2Object-generated harmful factors
If pre-bias is applied to set trap occupancy state, then RTS noise is reduced, but additional power consumption and control complexity are introduced
Solution Approach 1:
The patent applies pre-bias only during specific periods when the MOS device is in inactive or standby states, rather than continuously. The bias controller activates pre-bias during transitions between circuit states and deactivates it during active signal processing when trap occupancy is already stabilized. This periodic application reduces average power consumption while maintaining noise reduction benefits
Solution Approach 2:
The patent implements a dynamic bias control system that adapts pre-bias parameters based on real-time operating conditions. The controller adjusts pre-bias magnitude, duration, and timing according to temperature, circuit state, and detected noise levels, optimizing the balance between noise reduction and power consumption for each specific operating scenario
3Object-generated harmful factors
If pre-bias parameters are made selectively variable based on operating conditions, then noise reduction effectiveness is improved, but device complexity increases
Solution Approach 1:
The patent incorporates a feedback mechanism where the bias controller monitors operating conditions (temperature, circuit state, noise levels) and automatically adjusts pre-bias parameters accordingly. The controller receives input from temperature sensors, circuit state detectors, and noise measurement circuits, then selectively modifies pre-bias magnitude and duration to optimize noise reduction while maintaining manageable device complexity through automated closed-loop control
Data Source
AI summary
This application relates to control of semiconductor devices, in particular MOS devices, so as to reduce RTS/flicker noise. A circuit (100) includes a first MOS device (103, 104) and a bias controller (107). The circuit is operable in at least a first circuit state (PRO) in which the first MOS device is active to contribute to a first signal (Sout) and a second circuit state (PRST) in which the first MOS device does not contribute to the first signal. The bias controller is operable to control voltages at one or more terminals of the first MOS device to apply a pre-bias (VRB1, VPB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.