MOS-Triggered TVS Circuit for Low-Voltage Clamping

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Solution Overview

Problem

Existing transient voltage suppressor (TVS) circuits face challenges in providing effective voltage clamping and minimizing snap-back voltage variations at reduced voltages, such as 3.3 volts, due to high resistance and leakage currents, which limits miniaturization and increases the risk of circuit damage.

Innovation Solution

A MOS-triggered TVS circuit is developed, utilizing multiple stacked PMOS transistors with body regions tied to Vcc to create a reverse bias, coupled with a triggering circuit including NMOS and CMOS transistors, to achieve low leakage current and tunable trigger voltage between 3.3 to 5 volts, eliminating negative resistance and enhancing clamping performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Zener diodes are used for voltage clamping in TVS circuits, then voltage suppression protection is provided, but the high resistance per unit area requires large diode size which limits miniaturization

Engineering Contradiction:
Improvevoltage suppression protectionVSAvoiddiode size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent changes the triggering mechanism from direct Zener breakdown to MOS transistor threshold voltage triggering. By utilizing the MOS transistor's gate threshold voltage characteristic (which can be tuned to 3.3V or lower), the circuit achieves voltage suppression at lower voltages with smaller device area, directly resolving the contradiction between protection reliability and miniaturization.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the high-resistance Zener diode clamping mechanism with a MOS-triggered SCR (silicon controlled rectifier) system. The MOS transistor acts as a low-resistance switch that triggers the SCR to conduct, providing a low-impedance path for transient currents. This substitution eliminates the need for large-area high-resistance Zener diodes while maintaining protection functionality.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If Zener triggered NPN bipolar transistor is used to reduce clamp voltage, then snap-back phenomenon occurs causing voltage drop and circuit oscillations

Engineering Contradiction:
Improveclamp voltage reductionVSAvoidvoltage stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent introduces a MOS transistor as an intermediary between the trigger circuit and the SCR. The MOS transistor's gate serves as a controlled interface that can be precisely triggered at a specific voltage threshold without causing the snap-back effect. This intermediary control mechanism allows voltage clamping while maintaining voltage stability, resolving the contradiction between clamp voltage reduction and voltage stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If standard TVS circuits are designed for 5V operation, then protection is provided at 5V, but they cannot provide required protection at reduced voltages below 5V due to increasing leakage current

Engineering Contradiction:
Improveprotection functionVSAvoidvoltage range adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the triggering parameter from Zener breakdown voltage (typically >5V) to MOS transistor gate threshold voltage (tunable to 3.3V or lower). This parameter change enables the TVS circuit to adapt to lower operating voltages while maintaining protection functionality and minimizing leakage current, directly resolving the contradiction between protection reliability and voltage range adaptability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The MOS-triggered TVS circuit provides improved voltage clamping with reduced snap-back voltage drops and low leakage current, enabling effective protection at lower voltages while occupying smaller areas, thus addressing the limitations of existing TVS circuits.

Implementation Method 1

multiple stacked PMOS transistors with body regions tied to Vcc to create a reverse bias

Methodology Applied
Scientific EffectReverse bias:

Implementation Method 2

multiple stacked MOS transistors for turning into a conductive state by a transient voltage

Methodology Applied
Scientific EffectMOS transistor threshold voltage effect:

Implementation Method 3

A MOS transistor 191 is connected between an emitter and a collector of a first bipolar-junction transistor (BJT) 192

Methodology Applied
Scientific EffectMOS transistor triggering:

Implementation Method 4

coupled to a second BJT 194 of complemented type to form a SCR functioning as a main clamp circuit

Methodology Applied
Scientific EffectSCR conduction:

Implementation Method 5

there is a Zener diode, i.e., diode 30, with a larger size to function as an avalanche diode from the high voltage terminal

Methodology Applied
Scientific EffectZener breakdown:

Implementation Method 6

the high side diodes 15-H and 20-H provide a forward bias and are clamped by the large Vcc-Gnd diodes

Methodology Applied
Scientific EffectDiode forward bias:

Data Source

PatentUS8120887B2MOS transistor triggered transient voltage suppressor to provide circuit protection at a lower voltage
Publication Date: 2012.02.21 ALPHA & OMEGA SEMICONDUCTOR LTD
  • US8120887B2 patent drawing
  • US8120887B2 patent drawing
  • US8120887B2 patent drawing

AI summary

An electronic device formed as an integrated circuit (IC) wherein the electronic device further includes a transient voltage suppressing (TVS) circuit. The TVS circuit includes a triggering MOS transistor connected between an emitter and a collector of a first bipolar-junction transistor (BJT) coupled to a second BJT to form a SCR functioning as a main clamp circuit of the TVS circuit. The TVS circuit further includes a triggering circuit for generating a triggering signal for the triggering MOS transistor wherein the triggering circuit includes multiple stacked MOS transistors for turning into a conductive state by a transient voltage while maintaining a low leakage current.