Self-Aligned Gate Contacts for MOS Varactor Resistance Reduction
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Solution Overview
Problem
Short-channel metal oxide semiconductor (MOS) varactors in advanced RF technologies face challenges in achieving high quality factors due to increased gate resistance, which is exacerbated by the use of conventional gate contacts in interconnect layers, leading to lower performance in RF applications.
Innovation Solution
The implementation of self-aligned contacts (SACs) on the gate of MOS varactors, either as a long self-aligned contact (LSAC) or multiple self-aligned contacts (MSACs), significantly reduces the effective gate resistance by more than a factor of sixteen, thereby improving the quality factor of the varactor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional gate contacts are used in interconnect layers, then the manufacturing process is simpler, but the gate resistance increases and quality factor deteriorates
Solution Approach 1:
The patent transitions from planar gate contacts in interconnect layers to vertically-aligned self-aligned contacts that extend through multiple dielectric layers. This dimensional change allows the contact to reach the gate electrode directly without relying on complex lateral routing, thereby reducing gate resistance and improving quality factor while maintaining manufacturing feasibility through self-alignment.
Solution Approach 2:
The patent introduces self-aligned contact structures as intermediary elements that bridge the interconnect layers and the gate electrode. These SACs serve as dedicated conductive pathways that mediate the electrical connection, reducing the effective gate resistance by providing a direct, low-resistance path while the surrounding dielectric layers provide electrical isolation.
2Volume of moving object
If short-channel MOS varactors are used, then the device size is reduced, but the gate resistance increases due to scaling effects
Solution Approach 1:
The patent addresses the gate resistance issue in short-channel devices by moving the contact structure from the lateral plane to the vertical dimension. The self-aligned contacts extend vertically through dielectric layers to directly reach the gate electrode, providing a low-resistance path that compensates for the increased gate resistance inherent in scaled-down short-channel devices.
Solution Approach 2:
The patent segments the electrical connection path by introducing separate self-aligned contact structures that independently connect to the gate electrode. This segmentation allows for optimized contact geometry and material composition specifically for gate access, decoupling the gate connection quality from the overall device scaling constraints.
Data Source
AI summary
A short-channel metal oxide semiconductor varactor may include a source region of a first polarity having a source via contact. The varactor may further include a drain region of the first polarity having a drain via contact. The varactor may further include a channel region of the first polarity between the source region and the drain region. The channel region may include a gate. The varactor may further include at least one self-aligned contact (SAC) on the gate and between the source via contact and the drain via contact.