Mosaic Focal Plane Array With Interposer-Matched Tile Pitch

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Large format focal plane arrays (FPAs) face challenges in achieving affordable yield due to the inverse scaling of electrical yield with die area, especially when 3D integrated circuits are required to fit circuitry into available pixel area.

Innovation Solution

A mosaic integrated circuit device comprising small format, high yield integrated circuit tiles arranged to form a large format FPA, with an optically continuous detector array electrically connected via an interposer that adjusts the detector array pitch to match the tile pitch, minimizing optical gaps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a large single integrated circuit device is used to create a large format FPA, then the FPA can cover a large field of view, but the electrical yield decreases inversely with the die area

Engineering Contradiction:
ImproveFPA field of view coverageVSAvoidelectrical yield
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The large format FPA is divided into multiple small format integrated circuit tiles, each with its own detector array. These tiles are arranged in a mosaic pattern to collectively cover the large field of view. This segmentation allows each tile to be manufactured with high yield while achieving the desired large format coverage through composition of multiple smaller units.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If mechanical dithering is used to fill gaps between mosaic detectors, then the gaps are filled, but the overall frame rate decreases

Engineering Contradiction:
Improveoptical continuityVSAvoidframe rate
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

An interposer is introduced as an intermediary component between the detector array and the readout integrated circuit tiles. The interposer contains circuitry that actively fills the optical gaps between mosaic detectors through electronic means, eliminating the need for mechanical dithering and maintaining high frame rates while achieving optical continuity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If a stare-step approach is used with a single smaller sensor, then the larger field of regard is covered, but the overall frame or revisit rate slows down

Engineering Contradiction:
Improvefield of regardVSAvoidrevisit rate
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The field of regard is divided into multiple segments, each covered by a separate integrated circuit tile with its own detector array. All tiles operate simultaneously to capture the entire field of view, eliminating the sequential staring required in single-sensor approaches and maintaining high revisit rates while achieving large area coverage.

Inventive Principle:
Principle #1Segmentation

4Manufacturing precision

If four loosely spaced mosaic FPAs with independent optics are used, then a continuous image is created, but the device complexity increases

Engineering Contradiction:
Improveimage continuityVSAvoidnumber of independent systems
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Multiple small format integrated circuit tiles are merged into a single mosaic FPA assembly that functions as one integrated system. The tiles share common optics and are electrically interconnected through the interposer, creating a unified imaging system that achieves continuous image coverage without requiring four separate independent FPA systems.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250151444A1Mosaic focal plane array
Publication Date: 2025.05.08 RAYTHEON CO
  • US20250151444A1 patent drawing
  • US20250151444A1 patent drawing
  • US20250151444A1 patent drawing

AI summary

A focal plane array includes a mosaic integrated circuit device having a plurality of discrete integrated circuit tiles mounted on a motherboard. The focal plane array includes an optically continuous detector array electrically connected to the mosaic integrated circuit device with an interposer disposed therebetween. The interposer is configured to adjust a pitch of the continuous detector array to match a pitch of each of the plurality of discrete integrated circuit tiles so that the optical gaps between each of the plurality of integrated circuit tiles on the motherboard are minimized and the detector array is optically continuous, having high yield over the large format focal plane array.