Mosaic Composite Oxide Semiconductor for Low-Leakage Transistors
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Solution Overview
Problem
Existing oxide semiconductor transistors, particularly those using a dual-layer stack of indium zinc oxide and IGZO, face challenges with high subthreshold swing (S value) and threshold voltage, leading to suboptimal electrical characteristics and reliability.
Innovation Solution
A composite oxide semiconductor with a mosaic pattern structure, comprising regions of indium oxide, gallium oxide, and zinc oxide with specific atomic ratios, is developed to enhance electrical properties and reliability, featuring a cloud-aligned composite (CAC) structure that improves field-effect mobility and reduces off-state current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dual-layer stack of indium zinc oxide and IGZO is used as the active layer, then field-effect mobility is improved (μ=62 cm²V⁻¹s⁻¹), but subthreshold swing becomes large (S=0.41 V/decade) and threshold voltage becomes negative (Vth=−2.9 V)
Solution Approach 1:
The patent applies local quality by creating distinct regions within the oxide semiconductor layer with different elemental compositions. Specifically, it forms regions enriched with indium (In-rich regions) and regions enriched with gallium (Ga-rich regions) in a mosaic pattern. The In-rich regions provide high carrier mobility while the Ga-rich regions contribute to better threshold voltage control and reduced subthreshold swing, allowing each local area to optimize for its specific function.
Solution Approach 2:
The patent employs composite materials by combining multiple oxide semiconductor phases with different compositions within a single active layer. The composite structure includes indium zinc oxide (IZO), gallium zinc oxide (GZO), and their solid solutions arranged in a nanoscale mosaic pattern. This composite approach leverages the high mobility of IZO regions while utilizing the favorable electrical characteristics of GZO regions to achieve overall improved transistor performance.
2Reliability
If indium content is increased to improve field-effect mobility, then carrier mobility increases, but off-state current increases and reliability decreases
Solution Approach 1:
The patent resolves this contradiction by implementing local quality through spatially separated functional regions. Indium-rich regions are distributed throughout the oxide semiconductor layer to provide high carrier mobility pathways, while gallium-rich regions are interspersed to suppress off-state current. This local differentiation allows the material to simultaneously exhibit high mobility when on and low leakage when off, eliminating the need to choose between conflicting properties.
Solution Approach 2:
The patent applies parameter changes by varying the local composition parameters (indium and gallium concentrations) across different regions of the oxide semiconductor. By controlling the atomic ratios of In, Ga, and Zn in different areas, the patent optimizes the electrical parameters locally - high In content for mobility enhancement in channel regions, and high Ga content for leakage suppression in barrier regions - thereby achieving both high on-state current and low off-state current.
Data Source
AI summary
A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.