MOSCAP-Coupled Input Offset Detection Amplifier for Memory Sensing
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Solution Overview
Problem
Conventional input/output sense amplifier (IOSA) circuits face issues with decreased sensing yield due to process, voltage, and temperature variations, leading to increased power consumption and circuit area, and require large voltage swings for robust detection.
Innovation Solution
The proposed IOSA circuit directly connects the input to the source of a P-type metal oxide-semiconductor (PMOS) and uses a small metal-oxide-semiconductor capacitor (MOSCAP) between the gates of two PMOS transistors, allowing for simultaneous input phases and reducing offset cancellation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional IOSA circuits are used with traditional configurations, then sensing yield is maintained under normal conditions, but sensing yield decreases as offset increases due to PVT variations and circuit area increases
Solution Approach 1:
The circuit is segmented into distinct functional blocks: a first IOSA circuit for sensing and a second IOSA circuit for offset cancellation. This segmentation allows each circuit to be optimized independently, reducing the overall area required while maintaining sensing yield through specialized functionality in each segment.
Solution Approach 2:
Offset cancellation is performed as a preliminary action before main sensing operations. The second IOSA circuit pre-cancels offsets by sensing and correcting mismatch voltages in advance, which improves the reliability of subsequent sensing operations without requiring larger circuit area for the main sensing function.
2Measurement precision
If IOSA circuits use traditional amplification configurations, then detection robustness is achieved, but power consumption increases due to large voltage swings required in GIO lines
Solution Approach 1:
The circuit employs dynamic switching between different operational modes using control signals (OC_EN, SEN_EN). The IOSA circuits can dynamically transition between offset cancellation mode and main sensing mode, allowing robust detection only when necessary while minimizing power consumption during normal operations through selective activation.
Solution Approach 2:
The circuit changes operational parameters by using different transistor configurations and connection topologies depending on the mode. During offset cancellation, the second IOSA circuit uses a configuration optimized for small signal detection, while the first IOSA circuit uses a configuration optimized for main sensing, thereby reducing overall power consumption while maintaining detection robustness.
3Reliability
If offset cancellation is performed using traditional methods, then offset correction is achieved, but sensing time increases due to sequential operation requirements
Solution Approach 1:
The offset cancellation function and main sensing function are merged into a unified circuit architecture where the first and second IOSA circuits share common components and operational pathways. This merging allows offset correction and sensing to be performed in an integrated manner, reducing the total sensing time while maintaining offset correction reliability through coordinated operation of both circuits.
Data Source
AI summary
According to various embodiments of the present invention, an input/output sense amplifier circuit in a sense amplifier circuit includes a 1-1 transistor having a source connected to a first global input/output line, a 1-2 transistor having a source connected to a second global input/output line, and a metal-oxide-semiconductor capacitor (MOSCAP) configured to connect a gate of the 1-1 transistor to a gate of the 1-2 transistor.