MOSFET Source With Alternating P-Type N-Type Regions
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Solution Overview
Problem
Conventional MOSFET devices suffer from parasitic bipolar devices that degrade their performance, particularly at voltage and current extremes, leading to a smaller safe operating area and increased susceptibility to transient stress failure.
Innovation Solution
The implementation of a source with interdigitated or alternating P+/N+ regions in MOSFET devices, which reduces parasitic effects and enhances the safe operating area by controlling electron and hole flow through the use of silicide layers or silicided block regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional MOSFET structure with single-doped source region is used, then the device structure is simple, but parasitic bipolar devices degrade performance and reduce safe operating area
Solution Approach 1:
The source region is segmented into multiple alternating P-type and N-type doped regions instead of using a single uniform doped region. This segmentation creates a multi-zone source structure that disrupts the formation path of parasitic bipolar devices while maintaining electrical functionality, thereby improving safe operating area without excessive complexity
Solution Approach 2:
Different portions of the source region are assigned different doping types (P-type and N-type alternating regions) to create local variations in electrical properties. This local quality differentiation allows specific zones to control carrier flow and suppress parasitic bipolar device formation, improving reliability while managing structural complexity
2Reliability
If a source with alternating P+/N+ regions is implemented, then parasitic bipolar device effects are reduced and safe operating area improves, but device fabrication complexity increases
Solution Approach 1:
The alternating P+/N+ regions are formed during the preliminary device fabrication stages through selective doping processes. By establishing this complex source structure early in the manufacturing sequence, subsequent fabrication steps can proceed with standard processes, thereby improving transient stress resistance while minimizing the impact on overall fabrication ease
3Volume of moving object
If conventional source configuration is used, then manufacturing process is straightforward, but device size cannot be reduced further
Solution Approach 1:
The source region employs vertical alternating P+/N+ doped zones extending into the substrate, utilizing the depth dimension to suppress parasitic bipolar device formation. This vertical dimensionality approach allows device size reduction in the planar direction while maintaining functionality through the third dimension, effectively reducing overall device volume despite increased configurational complexity
Data Source
AI summary
Apparatus and methods are provided for fabricating semiconductor devices with reduced bipolar effects. One apparatus includes a semiconductor body (120) including a surface and a transistor source (300) located in the semiconductor body proximate the surface, and the transistor source includes an area (310) of alternating conductivity regions (3110, 3120). Another apparatus includes a semiconductor body (120) including a first conductivity and a transistor source (500) located in the semiconductor body. The transistor source includes multiple regions (5120) including a second conductivity, wherein the regions and the semiconductor body form an area (510) of alternating regions of the first and second conductivities. One method includes implanting a semiconductor well (120) including a first conductivity in a substrate (110) and implanting a plurality of doped regions (5120) comprising a second conductivity in the semiconductor well. An area (510) comprising regions of alternating conductivities is then formed in the semiconductor well.