MOSFET Antifuse Elements Eliminate Fuse Voids
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Solution Overview
Problem
Conventional fuse elements with copper interconnects are vulnerable due to void spaces created after melting and occupy large areas, posing security risks and space inefficiencies in memory arrays.
Innovation Solution
The use of MOSFETs with engineered channel regions and hot carrier injection to create antifuse elements that permanently form conductive paths through gate oxide layers, eliminating void spaces and reducing area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fuse elements with copper interconnects are used, then overcurrent protection is provided, but void spaces are created after melting which pose security risks
Solution Approach 1:
The patent changes the material parameter from copper to silicon, fundamentally altering the melting behavior. Silicon has a much higher melting point (1414°C) compared to copper (1085°C), and when silicon fuses, it forms a solid glassy residue rather than leaving void spaces, thereby eliminating the security risk while maintaining overcurrent protection functionality
Solution Approach 2:
The patent uses silicon, an abundant and inexpensive semiconductor material, to replace expensive copper interconnects in fuse elements. The silicon-based fuse element is designed to be sacrificial and disposable, melting under overcurrent conditions to provide protection, while its solid residue maintains structural integrity without creating security vulnerabilities
2Reliability
If fuse elements with copper wire are used, then overcurrent protection is achieved, but large area is occupied in memory arrays
Solution Approach 1:
The patent changes the physical and electrical parameters of the fuse element by using silicon instead of copper. Silicon's different melting characteristics and solid residue formation allow for more compact fuse结构设计, reducing the area required for each fuse element in the memory array while maintaining the overcurrent protection function
3Reliability
If copper interconnects are used in fuse elements, then electrical conductivity is provided, but security vulnerabilities arise from melted void spaces
Solution Approach 1:
The patent employs silicon as a disposable sacrificial material in fuse elements. The silicon provides necessary electrical conductivity during normal operation but is designed to melt and form a solid glassy residue under fault conditions, eliminating security vulnerabilities associated with copper void spaces while maintaining functionality
Solution Approach 2:
The patent creates a composite structure where silicon is integrated into the fuse element design, combining the electrical conductivity needed for normal operation with the desirable property of forming a solid, non-void residue upon melting, thereby resolving the security vulnerability issue
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The antifuse elements provide enhanced security and space efficiency by representing digital states without voids, offering improved overcurrent protection and reduced area occupancy compared to traditional fuse elements.
Implementation Method 1
a second concentration higher than the first concentration; a gate oxide layer above the channel area; a gate electrode above the gate oxide layer; where a first resistance exists between the source electrode and the gate electrode, and where a second resistance exists between the source electrode and the gate electrode, and a path through the gate oxide layer to couple the source electrode and the gate electrode, after a programming operation is performed when a programming voltage is applied to the gate electrode and the source electrode is coupled to a ground voltage to generate a current between the source electrode, the gate oxide layer, and the gate electrode
Data Source
AI summary
Embodiments herein may describe techniques for an integrated circuit including a MOSFET having a source area, a channel area, a gate electrode, and a drain area. The channel area may include a first channel region with a dopant of a first concentration next to the source area, and a second channel region with the dopant of a second concentration higher than the first concentration next to the drain area. A source electrode may be in contact with the source area, a gate oxide layer above the channel area, and the gate electrode above the gate oxide layer. A first resistance exists between the source electrode and the gate electrode. A second resistance exists between the source electrode, the gate electrode, and a path through the gate oxide layer to couple the source electrode and the gate electrode after a programming operation is performed. Other embodiments may be described and/or claimed.