Power MOSFET Layout for Avalanche Tolerance and Vth Stability
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Solution Overview
Problem
Existing power metal oxide semiconductor field effect transistors (MOSFETs) face challenges in improving avalanche breakdown tolerance while maintaining stable threshold voltage, as misalignment in trench formation can lead to fluctuations in threshold voltage and hinder effective discharge of minority carriers.
Innovation Solution
The semiconductor device incorporates alternating FET and non-FET operation portions with strategically designed high-concentration regions and contact parts, ensuring minority carriers are efficiently discharged, thereby enhancing avalanche breakdown tolerance while minimizing threshold voltage fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a contact trench is formed to discharge minority carriers and improve avalanche breakdown tolerance, then avalanche breakdown tolerance is improved, but threshold voltage fluctuates due to manufacturing misalignment
Solution Approach 1:
The patent applies local quality by creating a high-concentration semiconductor region with specifically controlled dimensions (width 0.5-2.0 μm, depth 0.5-1.5 μm) at a defined distance (0.5-2.0 μm) from the gate insulating film boundary. This localized high-concentration region provides sufficient minority carrier discharge capability to improve avalanche breakdown tolerance while its precise dimensional control ensures it remains far enough from the gate insulating film to avoid threshold voltage fluctuations, thus resolving the contradiction between reliability improvement and manufacturing precision.
2Manufacturing precision
If the size or impurity concentration of the high-concentration region is limited to avoid threshold voltage fluctuation, then threshold voltage stability is maintained, but avalanche breakdown tolerance improvement becomes difficult
Solution Approach 1:
The patent resolves this contradiction by optimizing specific parameters of the high-concentration region: setting the width to 0.5-2.0 μm, depth to 0.5-1.5 μm, and impurity concentration to 1×10^19 to 1×10^21 atoms/cm³, with the region positioned 0.5-2.0 μm from the gate insulating film boundary. These parameter changes create a balanced configuration where the high-concentration region is sufficiently large and concentrated to discharge minority carriers effectively for avalanche breakdown tolerance, yet precisely dimensioned and positioned to maintain threshold voltage stability, thus simultaneously achieving both goals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively improves avalanche breakdown tolerance while suppressing fluctuations in threshold voltage, even in the presence of manufacturing misalignments, by optimizing the layout and impurity concentrations of high-concentration regions.
Implementation Method 1
the avalanche breakdown tolerance can be improved by discharging the minority carriers accumulated in the base region to the outside
Data Source
AI summary
A semiconductor device according to an embodiment includes a semiconductor layer, a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type. The semiconductor layer includes a first portion and a second portion. The first portion includes a third electrode provided in the second semiconductor region via an insulating region, and a fourth semiconductor region of the second conductivity type provided in the second semiconductor region. The second portion includes a conductive connection part having a length in a third direction smaller than that of the third electrode; and a fifth semiconductor region of the second conductivity type that is provided in the second semiconductor region, and has a length, in the third direction, of the fifth semiconductor region larger than that of the fourth semiconductor region.