MOSFET Carrier Compensation Electrode for Switching Stability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional MOSFETs exhibit irregularities in switching characteristics when turned off due to charge balance irregularities around the gate, leading to increased switching characteristics irregularities and feedback capacitance, which affects their performance in power conversion circuits.

Innovation Solution

A MOSFET design with a carrier compensation electrode between the gate electrode and the trench bottom, along with an insulation region separating the carrier compensation electrode from the trench walls and bottom, and a source electrode connected to the carrier compensation electrode, which minimizes displacement current flow into the gate electrode, thereby reducing the impact of charge balance irregularities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional MOSFET structure with super junction is used, then low ON resistance and high withstand voltage are achieved, but irregularities in charge balance around the gate cause large irregularities in switching characteristics when turned off

Engineering Contradiction:
Improveswitching characteristics stabilityVSAvoidswitching characteristic irregularity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

A carrier compensation electrode is introduced as an intermediary component between the gate electrode and the trench bottom. This carrier compensation electrode serves as a mediator to compensate for charge balance irregularities in the n-type and p-type column regions, thereby reducing irregularities in switching characteristics when the MOSFET is turned off, while maintaining the conventional super junction structure for low ON resistance and high withstand voltage

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If charge balance irregularity occurs in n-type and p-type column regions, then manufacturing simplicity is maintained, but large irregularity in switching characteristics occurs when MOSFET is turned off

Engineering Contradiction:
Improvecharge balance toleranceVSAvoidswitching characteristics consistency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The carrier compensation electrode is positioned and configured in advance to compensate for potential charge balance irregularities before they affect switching characteristics. By having this compensatory structure pre-established, the MOSFET can tolerate manufacturing variations in dopant amounts while maintaining consistent switching characteristics

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Device complexity

If gate electrode is positioned close to n-type column region, then device complexity is reduced, but displacement current flows into gate electrode causing switching irregularities

Engineering Contradiction:
Improvetrench structure simplicityVSAvoiddisplacement current effect on gate
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The carrier compensation electrode acts as an intermediary that intercepts displacement current before it can reach the gate electrode. This allows the gate electrode to remain positioned close to the n-type column region for structural simplicity, while the carrier compensation electrode compensates for the harmful displacement current effect

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces switching characteristics irregularities and feedback capacitance, maintaining low ON resistance and high withstand voltage while minimizing the effect of charge balance irregularities, even when irregularities occur, and allows for cost-effective and compact electronic equipment design.

Implementation Method 1

a gate insulation film formed on inner peripheral surfaces of the trenches 122, and a gate electrode formed in the trenches 122 by way of the gate insulation films 124

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a carrier compensation electrode positioned between the gate electrode and the bottom of the trench 122... even when an irregularity exists in a charge balance around the gate, an irregularity in switching characteristics when the MOSFET is turned off can be decreased

Methodology Applied
Scientific EffectCharge compensation: Electrical Accumulator

Implementation Method 3

an insulation region disposed in the trench, the insulation region extending between the gate electrode and the carrier compensation electrode, and extending along the side walls and the bottom of the trench thus separating the carrier compensation electrode from the side walls and the bottom

Methodology Applied
Scientific EffectElectrical isolation: Dielectric

Implementation Method 4

a source electrode positioned on a surface of the semiconductor base substrate on a first main surface side, the source electrode electrically connected to the source region and also electrically connected to the carrier compensation electrode

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10468480B1MOSFET and power conversion circuit
Publication Date: 2019.11.05 SHINDENGEN ELECTRIC MANUFACTURING CO LTD
  • US10468480B1 patent drawing
  • US10468480B1 patent drawing
  • US10468480B1 patent drawing

AI summary

Provided is a MOSFET which includes: a semiconductor base substrate having an n-type column region and a p-type column region, a base region and a source region, wherein a super junction structure is formed of the n-type column region and the p-type column region; a trench having side walls and a bottom; a gate electrode formed in the trench by way of a gate insulation film; a carrier compensation electrode positioned between the gate electrode and the bottom of the trench; an insulation region separating the carrier compensation electrode from the side walls and the bottom; and a source electrode electrically connected to the source region and also electrically connected to the carrier compensation electrode. According to the MOSFET of the present invention, even when an irregularity in a charge balance occurs around the gate, an irregularity in switching characteristics when the MOSFET is turned off can be decreased.