Fast/Slow MOSFET Cell Layout for Switching Voltage Overshoot
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Solution Overview
Problem
High power semiconductor devices experience voltage spikes and oscillations during switching events, which can lead to power loss and potential device damage, and existing methods to suppress these spikes, such as RC snubbers, increase component cost and power loss.
Innovation Solution
A method involving a combination of fast and slow switching transistors within a high power module, where slow transistors are configured with a high gate RC time constant to suppress voltage overshoot without reducing overall switching speed, using shielded gate MOSFETs with specific resistor connections to adjust gate-to-drain capacitance and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If RC snubbers are used to suppress voltage spikes, then voltage overshoot is reduced, but component cost and power loss increase
Solution Approach 1:
The patent changes the RC time constant parameter of the gate driver circuit to suppress voltage spikes. By adjusting the resistance and capacitance values in the gate driver, the circuit optimizes the charging and discharging rates of the MOSFET gate, thereby controlling the switching speed and suppressing voltage overshoot without requiring external RC snubbers.
Solution Approach 2:
The gate driver circuit acts as an intermediary between the control signal and the MOSFET switch. It mediates the switching process by controlling the gate voltage transition, which in turn controls the MOSFET's on/off state. This intermediary approach allows for controlled switching that suppresses voltage spikes without adding external suppression components.
2Productivity
If switching speed is increased to improve efficiency, then power loss is reduced, but voltage overshoot increases
Solution Approach 1:
The patent optimizes the RC time constant parameter of the gate driver to achieve the desired balance between switching speed and voltage overshoot suppression. By carefully selecting the resistance and capacitance values, the circuit enables fast switching while controlling the rate of voltage change to prevent excessive overshoot.
Solution Approach 2:
The gate driver circuit dynamically controls the gate voltage transition by utilizing the RC time constant. During switching events, the circuit automatically adjusts the charging and discharging rates based on the applied voltage, enabling adaptive control of the switching speed to suppress voltage spikes while maintaining high efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively suppresses voltage spikes and oscillations while minimizing power loss by balancing fast and slow switching cells within the module, optimizing switching speed and efficiency.
Implementation Method 1
configuring the plurality of second transistors to have a greater RC time constant than the plurality of first transistors
Implementation Method 2
a gate resistor coupled between the first gate and the second gate, the gate resistor configured to reduce voltage overshoot during a switching event
Data Source
AI summary
Devices and methods are disclosed for facilitating faster switching of silicon-based and silicon carbide-based power transistors suitable for use in electric vehicles. The disclosed techniques can minimize the impact on turn-on and turn-off losses, while reducing gate voltage and drain voltage spikes during device switching. A fast/slow cell design incorporating shielded gate MOSFETs controls gate-to-drain capacitance and gate resistances to optimize suppression of voltage overshoot.