MOSFET Channel Layout With Triangular Protrusion for Short-Channel Control
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Solution Overview
Problem
The scaling down of metal-oxide-semiconductor field-effect transistors (MOS-FETs) in semiconductor devices leads to deterioration in operational properties, necessitating improved electric characteristics to maintain performance.
Innovation Solution
A semiconductor device design featuring a substrate with division regions, active patterns, and channel patterns, where the smallest width of the first active pattern is smaller than the second, and includes protruding portions on the channel patterns adjacent to the division region, enhancing the device's electric characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If MOS-FETs are scaled down to meet increasing demand for small pattern size, then pattern size is reduced, but operational properties deteriorate
Solution Approach 1:
The patent applies local quality by creating asymmetric channel patterns where the first channel pattern has a different width than the second channel pattern. Specifically, the first channel pattern adjacent to the division region has a narrower width, which provides better electrostatic control and reduces short channel effects in that critical region, while the second channel pattern has a wider width to maintain drive current. This local differentiation allows the device to operate reliably at smaller overall dimensions.
Solution Approach 2:
The patent introduces dimensional variation by extending the first channel pattern in the first direction to form a protruding portion. This creates a three-dimensional channel structure where the channel width varies along the channel length, providing enhanced control over carrier transport and improving device performance at scaled dimensions.
2Area of moving object
If channel patterns are made narrower to reduce device footprint, then area is reduced, but short channel effects increase
Solution Approach 1:
The asymmetric channel width design applies local quality by narrowing the channel only in specific regions (first channel pattern) where it provides benefit, while maintaining wider channels in other regions (second channel pattern) where drive current is critical. This localized width modulation suppresses short channel effects without sacrificing overall device performance.
Solution Approach 2:
The channel pattern creates a dynamic width profile along the channel direction, with the first channel pattern having variable width due to the protruding portion. This dynamic geometric configuration allows the effective channel width to be modulated, providing better electrostatic control in narrow regions while maintaining adequate current drive in wider regions.
Data Source
AI summary
A semiconductor device including a substrate including a division region extending in a first direction, first and second active patterns on the substrate with the division region interposed therebetween, the first and the second active patterns being spaced apart from each other in a second direction perpendicular to the first direction, gate electrodes extending in the first direction and crossing the first and second active patterns, a first channel pattern on the first active pattern, and a second channel pattern on the second active pattern may be provided. The smallest width of the first active pattern may be smaller than the smallest width of the second active pattern, in the first direction. An end portion of the first channel pattern adjacent to the division region may include a protruding portion extending in the first direction, and the protruding portion may have a triangle shape in a plan view.