Gate Dielectric Cladding for MOSFET Threshold Voltage Tuning
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Solution Overview
Problem
Current CMOS devices, particularly multi-gate devices like FinFET and GAA transistors, face challenges in tuning threshold voltages due to their small size, limiting the ability to incorporate different work function metals and thus achieving optimal performance and power efficiency.
Innovation Solution
Incorporating dipole materials into the gate dielectric layers of n-type and p-type MOSFETs to tune threshold voltages, allowing for flexible adjustment of voltage levels without the need for patterning work function metals, suitable for nano-sized transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If multi-gate devices are scaled down to smaller dimensions, then device density and integration are improved, but the ability to tune threshold voltages using different work function metals is reduced
Solution Approach 1:
The patent changes the parameter used for threshold voltage tuning from work function metal selection to dipole moment adjustment. By incorporating dipole materials with different dipole moments into the gate dielectric layer, the threshold voltage can be tuned independently of device dimensions, resolving the contradiction between scaling and tuning capability
Solution Approach 2:
The patent introduces dipole materials as an intermediary between the gate electrode and channel. These dipole materials (such as aluminum oxide, gallium oxide, zinc oxide) act as a mediator that modifies the electric field and potential distribution, enabling threshold voltage control without requiring different work function metals
2Reliability
If different work function metals are used to tune threshold voltages, then performance optimization is improved, but device complexity and fabrication difficulty increase
Solution Approach 1:
The patent makes the gate dielectric layer multi-functional by incorporating dipole materials that simultaneously provide dielectric function and threshold voltage tuning function. This universal approach eliminates the need for separate work function metal layers with different materials, simplifying the fabrication process while maintaining performance optimization capability
Solution Approach 2:
The patent applies local quality by incorporating dipole materials specifically in regions where threshold voltage tuning is needed. The dipole materials can be selectively deposited or incorporated into the gate dielectric layer, allowing local adjustment of threshold voltages for different transistors or regions without affecting the entire device structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible tuning of threshold voltages in both n-type and p-type MOSFETs, improving performance and reducing power consumption, while being compatible with existing CMOS fabrication processes and suitable for continued downscaling.
Implementation Method 1
Incorporating dipole materials into the gate dielectric layers of n-type and p-type MOSFETs to tune threshold voltages
Implementation Method 2
performing a thermal process to drive at least some dipole elements from the second dipole layer into the gate dielectric layer
Data Source
AI summary
A method includes providing a first channel layer and a second channel layer over a substrate; forming a first patterned hard mask covering the first channel layer and exposing the second channel layer; selectively depositing a cladding layer on the second channel layer and not on the first patterned hard mask; performing a first thermal drive-in process; removing the first patterned hard mask; after removing the first patterned hard mask, forming an interfacial dielectric layer on the cladding layer and the first channel layer; and forming a high-k dielectric layer on the interfacial dielectric layer.