Power MOSFET Gate Structure With Conductive Layer for Lower On-Resistance
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Solution Overview
Problem
Existing power MOSFETs face challenges in reducing on-resistance, which affects their performance in electronic devices, particularly in vertical trench-gate power MOSFETs where the current path between the source and drain is not efficiently shortened.
Innovation Solution
A power MOSFET design featuring a conductive layer that surrounds a gate structure within a base region, with a specific gate structure configuration and electrode layout, including a first and second portion of the gate structure located in different regions, and a conductive layer positioned between the insulating layer and the substrate, effectively reducing on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If a vertical trench-gate power MOSFET design is used with source and drain on opposite sides of the substrate, then the current path between source and drain is shortened, but the on-resistance cannot be sufficiently reduced
Solution Approach 1:
The gate structure is divided into a first portion located in the drift region and a second portion located in the doped region, allowing different segments to serve different functions in optimizing current flow paths
Solution Approach 2:
A conductive layer is introduced as an intermediary element that surrounds the gate structure and connects the first and second portions, creating additional conductive pathways to reduce on-resistance
2Reliability
If the gate structure is positioned deep in the substrate to shorten current path, then on-resistance should decrease, but manufacturing complexity increases
Solution Approach 1:
The gate structure is segmented into multiple portions located in different regions (drift region and doped region), making the complex deep-substrate configuration more manageable and manufacturable
Solution Approach 2:
The conductive layer surrounds and nests the gate structure, with the insulating layer positioned between them, creating a nested configuration that simplifies manufacturing while maintaining performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The described configuration effectively reduces the on-resistance of the power MOSFET, enhancing its performance by promoting electron accumulation and improving current flow efficiency between the source and drain.
Implementation Method 1
The conductive layer effectively shortens the current path and enhances electron accumulation
Implementation Method 2
the conductive layer effectively shortens the current path and enhances electron accumulation, leading to improved performance and efficiency of the power MOSFET by reducing on-resistance
Data Source
AI summary
Provided are a power MOSFET and a manufacturing method thereof. The power MOSFET includes a substrate, base, doped and drift regions, a gate structure, an insulating layer, a conductive layer, a source electrode and a drain electrode. The base region is in the substrate and adjacent to a first surface of the substrate. The doped region is in the base region and adjacent to the first surface. The drift region is under the base region. The gate structure is in the substrate and includes first and second portions. The first portion is located in the drift region. The second portion is located in the doping, base and drift regions. The insulating layer is disposed between the gate structure and the substrate. The conductive layer surrounds the second portion. The source electrode is connected to the doped region. The drain electrode is disposed on a second surface of the substrate.


