MOSFET Contact Structure for Avalanche Withstand and Gate Insulation
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Solution Overview
Problem
In semiconductor devices with MOSFETs, the alignment margin of trench contacts is reduced when attempting to increase their width to improve avalanche withstand, leading to potential shifts in trench contact formation, which can compromise insulation between the gate and source electrodes and cause fluctuations in threshold voltage.
Innovation Solution
The semiconductor device incorporates a contact portion with a leading end portion that bulges toward the gate electrode, allowing for efficient extraction of minority carriers when the MOSFET is turned off, thereby enhancing avalanche withstand without increasing the contact width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of the trench contact is increased to improve avalanche withstand, then the avalanche withstand is improved, but the alignment margin is reduced causing potential shifts in trench contact formation
Solution Approach 1:
The contact portion transitions from a uniform width structure to a multi-dimensional structure with a first portion and a second portion having different widths. The second portion has a larger width than the first portion, creating a stepped or tapered configuration that provides both the increased width needed for avalanche withstand and the controlled geometry for precise alignment.
Solution Approach 2:
Different portions of the contact structure have different widths tailored to specific functional requirements. The first portion maintains a smaller width for proper alignment and insulation, while the second portion expands to provide sufficient width for avalanche withstand, creating localized optimization of properties throughout the contact structure.
2Reliability
If the width of the trench contact is increased to improve avalanche withstand, then the avalanche withstand is improved, but the insulation between gate electrode and source electrode cannot be sufficiently ensured
Solution Approach 1:
The contact portion uses a multi-dimensional width configuration where the first portion has a smaller width that maintains adequate spacing from the gate electrode for proper insulation, while the second portion extends wider to provide avalanche withstand capability without compromising the insulation provided by the first portion.
Solution Approach 2:
The contact structure implements local quality differentiation where the first portion near the gate electrode region maintains a smaller width to ensure insulation, while the second portion in the source electrode region has a larger width for avalanche withstand, optimizing both insulation and reliability in their respective locations.
3Reliability
If the width of the trench contact is increased to improve avalanche withstand, then the avalanche withstand is improved, but the threshold voltage of the MOSFET fluctuates
Solution Approach 1:
The stepped or tapered contact structure with varying widths in different portions provides a controlled geometric configuration that stabilizes the electric field distribution, preventing threshold voltage fluctuations while still achieving the necessary avalanche withstand through the expanded second portion.
Solution Approach 2:
By concentrating the width increase in the second portion away from the gate electrode while maintaining the first portion at its original width, the local quality of the electric field near the gate is preserved, preventing threshold voltage fluctuations while achieving avalanche withstand in the source region.
Data Source
AI summary
A semiconductor device according to an embodiment includes: a first electrode; a first semiconductor region of a first conductive type provided on the first electrode; a second semiconductor region of a second conductive type provided on the first semiconductor region; a third semiconductor region of a first conductive type provided on the second semiconductor region; a gate electrode provided in the second semiconductor region via a gate insulating film; a contact portion having a first portion and a second portion; and a second electrode electrically connected to the contact portion. The first portion is aligned with the third semiconductor region and a part of the second semiconductor region, and the second portion is provided at a lower end of the first portion and has a width larger than a width of the first portion at an upper end of the third semiconductor region.


