Current Spreading Layer in MOSFETs for Wider Electron Flow

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Solution Overview

Problem

Semiconductor devices, such as MOSFETs, face reduced current flow and low conversion efficiency due to restricted electron flow paths when the channel is horizontal, leading to concentrated current and potential defects from internal stress.

Innovation Solution

A semiconductor device design incorporating a current spreading layer with alternating doped regions and conductive materials, such as metals or carbon nanotubes, is implemented to disperse electron flow and enhance power conversion efficiency by expanding the electron flow area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the channel is horizontal, then the device structure is simple, but the electron flow path is restricted and current becomes weaker

Engineering Contradiction:
Improvedevice structureVSAvoidcurrent flow
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent introduces a vertical current spreading layer beneath the horizontal channel, adding a vertical dimension to current flow. This allows electrons to spread vertically through the current spreading layer while maintaining the simple horizontal channel structure, thereby increasing current flow without complicating the overall device architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If current is concentrated in a small area, then the device structure is compact, but conversion efficiency is not high

Engineering Contradiction:
Improvecurrent flow areaVSAvoidconversion efficiency
Core Design Contradiction:
Area of stationary objectVSLoss of energy

Solution Approach 1:

The current spreading layer is divided into multiple doped regions with alternating semiconductor types (first and second doped regions). This segmentation allows different regions to handle current flow differently, spreading the current across a larger area while maintaining efficient electron transport through the alternating doped structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the current spreading layer have different doping characteristics (first doped regions with first semiconductor-type dopants, second doped regions with second semiconductor-type dopants). This local quality variation optimizes current spreading in different areas, enhancing overall conversion efficiency by matching local electrical properties to local current flow requirements.

Inventive Principle:
Principle #3Local quality

3Area of stationary object

If current is concentrated in a small area, then the device structure is compact, but internal stress causes defects

Engineering Contradiction:
Improvecurrent flow areaVSAvoiddefect formation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The alternating first and second doped regions segment the current flow path, distributing mechanical stress across multiple regions rather than concentrating it in one area. This segmentation reduces internal stress accumulation and prevents defect formation while maintaining a compact overall device structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240079489A1Semiconductor device and manufacturing method thereof
Publication Date: 2024.03.07 HON YOUNG SEMICON CORP
  • US20240079489A1 patent drawing
  • US20240079489A1 patent drawing
  • US20240079489A1 patent drawing

AI summary

A semiconductor device includes a substrate, an epitaxial layer, a well region, a current spreading layer, a source region, a base region and a gate layer. The epitaxial layer is on the substrate. The well region is in the epitaxial layer. The current spreading layer is in the epitaxial layer and below the well region. The current spreading layer includes a plurality of the first doped regions and a plurality of the second doped regions, the first doped regions includes a plurality of dopants of the first semiconductor-type, the second doped regions includes a plurality of dopants of the second semiconductor-type, and the second semiconductor-type is different from the first semiconductor-type. The source region is in the well region. The base region is in the well region and adjacent to the source region. The gate layer is over the epitaxial layer.