MOSFET Channel Dopant Deactivation for Threshold Voltage Control
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Solution Overview
Problem
MOSFET devices face variability issues due to random dopant fluctuation and threshold voltage variations, which are linked to device channel profile and gate critical dimension variations, leading to increased variability.
Innovation Solution
The implementation of selective dopant deactivation in the region underneath the gate of MOSFET devices, achieved through localized carbon implantation or epitaxial layer formation, reduces active dopants in the channel region, thereby reducing threshold voltage roll-off slope and device variability. Additionally, halo implants are used to further improve the threshold voltage roll-off slope.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dopants are present in the channel region, then device conductivity is improved, but threshold voltage roll-off slope increases and device variability worsens
Solution Approach 1:
The patent applies local quality by creating a spatially non-uniform dopant distribution through selective deactivation. Specifically, dopants are deactivated only in the region directly underneath the gate (the channel region), while dopants are retained in other regions such as the source/drain extensions and bulk channel. This localized modification of dopant activity allows the channel to have low dopant concentration (reducing variability and roll-off) while other regions maintain higher dopant concentration (providing electrical contact and carrier supply).
Solution Approach 2:
The patent segments the dopant distribution into distinct zones with different dopant activities. The channel region underneath the gate is segmented as a deactivated zone, while source/drain regions and other channel portions remain activated. This segmentation is achieved through selective carbon implantation or epitaxial regrowth that deactivates dopants only in specific spatial locations, creating functionally distinct regions with optimized electrical properties for each zone.
2Productivity
If gate critical dimension is reduced, then device scaling is improved, but threshold voltage control deteriorates due to increased roll-off
Solution Approach 1:
The patent changes the physical and chemical parameters of the dopant distribution by selectively deactivating dopants in the channel region. This parameter change transforms the electrical characteristics of the channel, reducing the impact of dopant fluctuation on threshold voltage. The deactivation process modifies the effective dopant concentration from a high value (causing roll-off) to a low value (reducing roll-off), thereby improving threshold voltage control in scaled devices.
Solution Approach 2:
The patent applies preliminary anti-action by proactively deactivating dopants in the channel region before they can cause threshold voltage roll-off. The carbon implantation or epitaxial regrowth process is performed to preemptively neutralize the harmful effect of dopants in the channel, preventing the roll-off phenomenon from occurring in the first place, rather than attempting to correct it after device fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the threshold voltage roll-off slope, improving the consistency and performance of MOSFET devices by minimizing variability across different gate lengths, particularly for both long and short channel devices.
Implementation Method 1
localized carbon implantation
Implementation Method 2
epitaxial layer formation
Data Source
AI summary
A transistor includes a substrate. The transistor further includes a channel region comprising dopants of a first type. The transistor further includes a gate structure over the channel region. The transistor further includes a source comprising dopants of a second type. The transistor further includes a lightly doped drain (LDD) comprising dopants of the second type, wherein the LDD is over the source, and the channel region is in direct contact with the LDD. The transistor further includes a deactivated region in the channel region underneath the gate structure, wherein the deactivated region comprises a first region inside an epitaxial layer and a second region outside the epitaxial layer.


