Multi-Gate MOSFET Doping Sequence for Low Leakage Current
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Solution Overview
Problem
Multi-gate MOSFET devices, such as multi-bridge-channel transistors, suffer from current leakage due to dopant diffusion during thermal treatments, which degrades device performance as separation spacing decreases.
Innovation Solution
A method involving ion implantation, annealing, pre-bake processes, and epitaxial growth of alternating channel and sacrificial layers is employed to control dopant diffusion and maintain a satisfactory dopant concentration in the mesa region, reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thermal treatments are performed during multi-gate MOSFET fabrication, then device structure is formed and processed, but dopant diffusion occurs which degrades device performance
Solution Approach 1:
The patent applies preliminary action by performing ion implantation to establish the dopant concentration profile in the mesa region before subsequent thermal treatments. This pre-established profile serves as a foundation that guides the thermal processing steps, ensuring that dopant distribution is controlled and optimized before any diffusion can occur during annealing or epitaxial growth processes.
Solution Approach 2:
The patent employs parameter changes by carefully controlling and optimizing thermal treatment parameters (temperature, time, atmosphere) and epitaxial growth conditions. By adjusting these parameters, the patent minimizes unwanted dopant diffusion while still achieving the necessary structural formation, thus maintaining dopant concentration profiles and reducing leakage current.
2Productivity
If separation spacing between devices is decreased to increase functional density, then production efficiency increases, but leakage current increases due to dopant diffusion
Solution Approach 1:
The patent applies local quality by creating a specific dopant concentration profile localized in the mesa region between devices. This localized doping approach ensures that each device maintains its electrical characteristics while the mesa region provides appropriate isolation. The selective doping of the mesa region allows for reduced separation spacing without increasing leakage current, as the dopant distribution is precisely controlled in the critical isolation areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces leakage current by optimizing thermal treatments and epitaxial growth conditions to preserve dopant profiles, enhancing device performance.
Implementation Method 1
performing an ion implantation process to form a doped region in the substrate
Implementation Method 2
annealing the workpiece at temperature T1
Implementation Method 3
performing a pre-bake process at temperature T2... the temperature T2 is lower than the temperature T1
Implementation Method 4
epitaxially growing a vertical stack of alternating channel layers and sacrificial layers on the substrate
Data Source
AI summary
Semiconductor devices and methods are provided. In an embodiment, a method includes providing a workpiece including a first hard mask layer on a top surface of a substrate, performing an ion implantation process to form a doped region in the substrate, after the performing of the ion implantation process, annealing the workpiece at temperature T1. The method also includes selectively removing the first hard mask layer, after the selectively removing of the first hard mask layer, performing a pre-bake process at temperature T2, and, after the performing of the pre-bake process, epitaxially growing a vertical stack of alternating channel layers and sacrificial layers on the substrate, where the temperature T2 is lower than the temperature T1.