P-Channel MOSFET Edge Termination for High Voltage Reliability
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Solution Overview
Problem
Conventional high voltage (HV) semiconductor devices face reliability issues due to electrical field crowding and sensitivity to surface charges from dielectric layers and plastic packaging materials, which existing termination structures fail to completely shield.
Innovation Solution
A new edge termination configuration is introduced, featuring a series connection of P-channel MOSFETs between P-type diffusion regions or floating guard rings, with a poly silicon or metal layer acting as a planar or trench gate, effectively reducing surface electric fields and shielding the HV termination region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional floating guard rings are used in the termination area, then the device can block high voltage, but the structure is sensitive to surface charges from dielectric layers and plastic packaging materials, reducing reliability
Solution Approach 1:
The patent introduces P-channel MOSFETs as intermediary devices between the floating guard rings and the high voltage blocking junction. These MOSFETs act as shielded pathways that control electric field distribution, reducing sensitivity to surface charges while maintaining high voltage blocking capability. The MOSFET structures provide a controlled interface that mediates between the termination region and the active device area.
Solution Approach 2:
The patent modifies the termination structure by changing the electrical parameters through MOSFET threshold voltages and doping concentrations. By adjusting the P-channel MOSFET parameters (threshold voltage, channel width, doping levels), the electric field distribution is optimized to reduce surface charge effects while maintaining adequate breakdown voltage. This parameter optimization resolves the contradiction between reliability and charge sensitivity.
2Object-affected harmful factors
If field threshold MOSFETs are added to the termination area, then surface electric field is reduced and shielding is improved, but the device area increases
Solution Approach 1:
The patent transitions from conventional planar termination structures to three-dimensional MOSFET structures with vertical channels and gates. By utilizing the vertical dimension for the MOSFET channels and implementing trench-based structures, the solution achieves effective electric field control without proportionally increasing the horizontal termination area. The gate structures extend vertically into the substrate, providing enhanced shielding in a compact footprint.
Solution Approach 2:
The patent implements nested structures where P-channel MOSFETs are integrated within or adjacent to the floating guard ring system. The MOSFET channels are positioned within the termination region, and gate structures are nested between the guard rings. This nesting approach allows multiple protective functions to coexist in a compact arrangement, reducing the overall termination area while maintaining effective electric field control.
3Device complexity
If conventional termination structures are used, then the device structure is simple, but electrical field crowding occurs near the blocking junction at the device edge
Solution Approach 1:
The patent segments the termination region into multiple functional zones: floating guard rings, P-channel MOSFET regions, and transition zones. This segmentation allows different structures to address specific aspects of electric field control. The MOSFETs are positioned in specific segments to handle field crowding at critical locations, while guard rings provide overall termination. This divided approach effectively manages field distribution without requiring complete structural redesign.
Solution Approach 2:
The patent employs curved or rounded junction geometries in the MOSFET channel regions and guard ring configurations to reduce electric field concentration at sharp corners. By using curved field plates and rounded diffusion regions, the electric field lines are smoothed and distributed more evenly, reducing field crowding effects while maintaining adequate breakdown voltage. This geometric optimization complements the MOSFET-based shielding approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces electrical field crowding, enhances breakdown voltage, and minimizes the area required for termination while being less sensitive to surface charges, thereby improving the reliability and compactness of HV devices.
Implementation Method 1
A new edge termination configuration is introduced, featuring a series connection of P-channel MOSFETs between P-type diffusion regions or floating guard rings, with a poly silicon or metal layer acting as a planar or trench gate, effectively reducing surface electric fields and shielding the HV termination region
Data Source
AI summary
This invention discloses a semiconductor power device disposed in a semiconductor substrate comprising a lightly doped layer formed on a heavily doped layer and having an active cell area and an edge termination area. The edge termination area comprises a plurality P-channel MOSFETs. By connecting the gate to the drain electrode, the P-channel MOSFET transistors formed on the edge termination are sequentially turned on when the applied voltage is equal to or greater than the threshold voltage Vt of the P-channel MOSFET transistors, thereby optimizing the voltage blocked by each region.