MOSFET Epitaxial Source-Drain Structure for Lower Sigma-Vt
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Solution Overview
Problem
As MOSFETs scale below 40 nm, random doping variations cause significant fluctuations in threshold voltage and channel length, leading to increased power consumption and leakage in low-power circuits, particularly in SRAMs, due to uncertainties in dopant ion positions and high channel doping.
Innovation Solution
The use of low-temperature epitaxy to form raised source and drain structures with a lightly doped or undoped epitaxial layer, minimizing dopant diffusion into the substrate and creating abrupt junctions, which reduces random variations in channel length and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ion implantation and high channel doping are used to form source and drain structures, then transistor conductivity is improved, but random doping variations cause significant threshold voltage fluctuations and channel length variations
Solution Approach 1:
The patent replaces the mechanical ion implantation process with a chemical epitaxial growth process. Instead of physically implanting dopant ions into the silicon substrate, the dopants are incorporated during the epitaxial growth of the source and drain regions. This substitution eliminates the random scattering and positioning uncertainties inherent in ion implantation, thereby reducing random doping variations while maintaining the desired conductivity.
Solution Approach 2:
The patent changes the fundamental parameter of how doping is achieved - transitioning from post-growth ion implantation to in-situ dopant incorporation during epitaxial growth. By controlling the dopant concentration during the epitaxial process rather than through subsequent implantation, the patent achieves more uniform dopant distribution and reduces statistical variations in threshold voltage and channel length.
2Manufacturing precision
If high channel doping is used to reduce random dopant fluctuations, then threshold voltage control is improved, but power consumption and leakage current increase
Solution Approach 1:
The patent replaces high channel doping achieved through ion implantation with a controlled epitaxial growth approach. By using epitaxial growth to form the channel region with precise dopant incorporation, the patent achieves effective threshold voltage control without requiring excessively high doping concentrations that would increase power consumption and leakage current.
3Quantity of substance
If ion implantation is used to form source and drain extensions, then doping is achieved, but uncertainties in dopant ion positions cause random channel length variations
Solution Approach 1:
The patent substitutes the mechanical ion implantation process with chemical epitaxial growth for forming source and drain extensions. During epitaxial growth, dopants are incorporated uniformly as the crystal structure grows, eliminating the random positioning and scattering effects that occur during ion implantation. This results in more uniform channel length definitions at the junction interfaces.
4Productivity
If device dimensions are scaled down to increase device density, then more devices per area are achieved, but random doping variations have a more significant impact on device properties
Solution Approach 1:
The patent replaces ion implantation with epitaxial growth, which provides more uniform dopant distribution even at scaled dimensions. The epitaxial process maintains better control over dopant placement and concentration uniformity as device sizes decrease, thereby reducing the relative impact of random doping variations on device properties while enabling higher device density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces random threshold voltage variations, lowers channel doping, and improves electrostatic control, resulting in reduced power consumption and increased transistor reliability by minimizing the impact of drain voltage on threshold voltage and leakage.
Implementation Method 1
The use of low-temperature epitaxy to form raised source and drain structures with a lightly doped or undoped epitaxial layer
Implementation Method 2
minimizing dopant diffusion into the substrate and creating abrupt junctions, which reduces random variations in channel length and threshold voltage
Data Source
AI summary
A device structure with multiple layers of low temperature epitaxy is disclosed that eliminates source and drain and extension implants, providing a planar interface with abrupt junctions between epitaxial extensions and substrate, mitigating electrostatic coupling between transistor drain and transistor channel and reducing short channel effects. The reduction of channel doping results in improved device performance from reduced impurity scattering and reduction of random dopant induced threshold voltage variations (sigma-Vt). Avoiding implants further reduces device sigma-Vt due to random dopants' diffusion from source and drain extensions, which creates device channel length variations during thermal activation anneal of implanted dopants. The defined transistor structure employs at least two levels of low-temperature epitaxy, and creates a planar interface with various types of transistor substrates resulting in performance improvement. Mixed epitaxial layer growth materials inducing tensile or compressive gate stresses can be advantageously used with the invention to further improve device characteristics.