Trench MOSFET ESD Buffer Layer Prevents Gate Shorting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional trench MOSFET transistors face issues with electrostatic discharge (ESD) leading to gate and source shorting due to high voltage transient signals, causing permanent damage and reliability concerns, especially in high voltage DMOS devices.
Innovation Solution
The implementation of trenched gates underneath the contact areas of the ESD diode serves as a buffer layer to prevent shorting, using a substrate with a first conductivity type, a body region of a second conductivity type, and multiple trenched gates filled with doped polysilicon, with the third-type function trenched gates positioned symmetrically underneath the ESD trenched contact areas to prevent gate-body shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional trench contacts are applied for source and gate, then the device structure is simplified, but the ESD diode shorts with body-source region due to doped poly over-etching
Solution Approach 1:
An undoped polysilicon layer is introduced as an intermediary buffer layer between the doped polysilicon ESD protection diode and the body-source region. This undoped layer prevents direct contact and potential shorting while allowing the ESD diode to maintain its protective function. The undoped polysilicon acts as a physical barrier that stops the etching process from creating direct conductive paths between the ESD diode and the body-source region.
Solution Approach 2:
The undoped polysilicon layer is deposited beforehand to cushion or protect against the harmful effect of doped poly over-etching. This layer is placed in advance to prevent the potential shorting issue before it can occur during the etching process, rather than trying to fix the problem after the shorting has happened.
2Ease of manufacture
If doped poly over-etching is used to form contacts, then contact formation is achieved, but the insulator etch-through occurs due to poor etching selectivity
Solution Approach 1:
The undoped polysilicon layer serves as an intermediary that protects the underlying insulator layer during the etching process. This buffer layer absorbs or prevents the etching attack from reaching the insulator, thereby preventing etch-through while still allowing contact formation to proceed.
3Length of stationary object
If thin oxide layer is used as gate dielectric, then device size is reduced, but rupture is induced under high electric field from ESD
Solution Approach 1:
The undoped polysilicon layer acts as an intermediary protective layer that shields the thin oxide gate dielectric from the high electric field stress caused by ESD events. This buffer layer prevents direct exposure of the thin oxide to the full ESD voltage stress, reducing the likelihood of rupture while allowing the device to maintain its compact size.
Data Source
AI summary
A trench DMOS transistor employing trench contacts has overvoltage protection for prevention of shortage between gate and source, comprising a plurality of first-type function trenched gates, at least one second-type function trenched gate and at least two third-type function trenched gates extending through body regions and into an epitaxial layer. The first-type function trenched gates are located in active area surrounded by a source region encompassed in the body region in the epitaxial layer for current conduction. The second-type function trenched gates are disposed underneath a gate metal with a gate trenched contacts filled with metal plug for gate metal connection. The third type function trenched gates are disposed directly and symmetrically underneath ESD trenched contact areas of anode and cathode in an ESD protection diode, serving as a buffer layer for prevention of gate-body shortage.