MOSFET Gate Stack Nb Dipole Engineering for Vt Tuning
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Solution Overview
Problem
As integrated circuit devices shrink in size, maintaining switching speeds while preventing failures becomes a challenge due to difficulties in controlling device structure dimensions and modulating threshold voltages in MOSFETs, especially at sub 10-15 nm technology nodes.
Innovation Solution
A metal gate stack is developed with a high-κ metal oxide layer containing a dipole region comprising niobium (Nb), which is formed by depositing a niobium-based film using atomic layer deposition and driving it into the high-κ metal oxide layer through thermal treatment, thereby improving the threshold voltage (Vt) without incurring an equivalent oxide thickness (EOT) penalty.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional Vt modulation methods (interface dipole layer or work function adjusting layer) are used, then threshold voltage can be modulated, but the methods are incompatible with sub 10-15 nm technology nodes
Solution Approach 1:
The patent changes the material parameter by incorporating niobium (Nb) into the high-k metal oxide layer to form a dipole region, creating a new material composition that achieves Vt modulation while being compatible with advanced technology nodes. This involves changing the chemical composition and electronic structure of the gate dielectric layer.
Solution Approach 2:
The patent creates a composite structure by forming a dipole region within the high-k metal oxide layer, combining the high-k material with niobium to achieve both high dielectric constant and dipole moment effects. This composite approach enables simultaneous achievement of high EOT and Vt modulation.
2Productivity
If device dimensions are shrunk to increase functional density, then more devices can be packed per chip area, but controlling device structure dimensions and maintaining switching speeds becomes difficult
Solution Approach 1:
The patent applies local quality by creating a dipole region specifically at the interface between the high-k metal oxide layer and the channel, concentrating the Vt modulation effect where it is most needed. This localized approach allows precise control of device characteristics without affecting the entire device structure.
3Reliability
If a dipole region comprising niobium is formed in the high-k metal oxide layer, then threshold voltage is improved by greater than +100 mV, but equivalent oxide thickness penalty occurs
Solution Approach 1:
The patent changes the physical and chemical parameters of the high-k metal oxide layer by incorporating niobium, which simultaneously increases the dipole moment and maintains the dielectric constant. This parameter optimization achieves Vt improvement while minimizing EOT penalty to less than ~0.2 Å.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of a Nb-containing dipole region in the high-κ metal oxide layer of the metal gate stack enhances the threshold voltage by greater than +100 mV while maintaining a minimal equivalent oxide thickness penalty of less than ~0.2 Å, thus addressing the challenge of maintaining switching speeds and preventing failures in smaller device sizes.
Implementation Method 1
exposing the substrate to a thermal treatment at a second substrate temperature of at least 700° C. to drive the dipole film into the high-κ metal oxide layer and to form the dipole region comprising niobium
Implementation Method 2
depositing a dipole film on the high-κ metal oxide layer by exposing the surface of the substrate to a first precursor comprising niobium and optionally to a second precursor comprising nitrogen, oxygen, or carbon using atomic layer deposition
Data Source
AI summary
A metal gate stack on a substrate comprises: an interfacial layer on the substrate; a high-κ metal oxide layer on the interfacial layer, the high-κ metal oxide layer comprising a dipole region adjacent to the interfacial layer, the dipole region comprising niobium (Nb); a high-κ metal oxide capping layer on the high-κ metal oxide layer; a positive metal-oxide-semiconductor (PMOS) work function material above the high-κ metal oxide capping layer; and a gate electrode above the PMOS work function material. The dipole region is formed by driving Nb species of a Nb-based film into the high-κ metal oxide layer to form a dipole region.