MOSFET Gate Runner Layout With Tungsten Field Plate Support
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Solution Overview
Problem
Designing a power MOSFET gate runner that reduces internal gate resistance while maintaining or improving breakdown voltage, especially for voltage classes of 150V and higher, is challenging due to the difficulty in supporting full drain-to-source voltage and the additional field plate effect in the off state.
Innovation Solution
A gate runner design featuring a thin tungsten runner that follows the thick gate runner and contacts its underside, present above the edge termination region on sides devoid of the gate runner, which also serves as a field plate in the off state, improving the Ron*AA figure of merit without reducing breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the gate runner is removed to save space, then the active area is increased, but the field plate effect is lost and breakdown voltage is reduced
Solution Approach 1:
The field plate function is extracted from the thick gate runner and implemented by a separate thin tungsten runner. This allows the thick gate runner to be minimized or removed in certain regions while the thin tungsten runner maintains the necessary field plate effect for breakdown voltage support
Solution Approach 2:
A thin tungsten film/runner is used to provide the field plate effect with minimal thickness and area occupation. This thin film structure achieves the necessary electrical field control for high voltage support while occupying minimal space that would otherwise be available for active area
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the Ron*AA figure of merit by converting inactive semiconductor area to active area for additional transistor cells, maintaining or improving breakdown voltage and providing a field plate effect, as demonstrated by a 2V increase in breakdown voltage in simulations.
Implementation Method 1
the gate runner has an additional field plate effect in the off state, as the gate is grounded during the blocking (off) state
Implementation Method 2
the gate runner electrically connecting the gate pad to gate electrodes of the transistor cells
Data Source
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AI summary
A semiconductor die includes: a semiconductor substrate having an active region and an edge termination region that separates the active region from an edge of the semiconductor substrate; a plurality of transistor cells formed in the active region; a structured power metallization above the semiconductor substrate and including a gate pad and a gate runner that extends from the gate pad along one or more but not all sides of the semiconductor die above the edge termination region, the gate runner electrically connecting the gate pad to gate electrodes of the transistor cells; and a tungsten runner that follows the gate runner and contacts an underside of the gate runner. The tungsten runner is present above the edge termination region along each side of the semiconductor die that is at least partly devoid of the gate runner. A Method of producing the semiconductor die is also described.