MOSFET Gate Stack Etching Endpoint Detection
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Solution Overview
Problem
In non-volatile memory (NVM) gate stack etching, end point detection is challenging due to the simultaneous etching of conductive materials, which can lead to over etching and reduced reliability and variability in the NVM array.
Innovation Solution
Simultaneously etching a metal-oxide-semiconductor field effect transistor (MOSFET) gate stack with the same layers as the NVM gate stack, allowing for improved end point detection by mimicking the NVM gate stack material volume during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If simultaneous etching of two conductive materials is performed using a same mask, then the gate stack is formed, but over etching occurs which reduces reliability and increases variability
Solution Approach 1:
A dummy feature is introduced as an intermediary element that facilitates accurate endpoint detection during etching. The dummy feature contains additional material layers that serve as a reference for detecting when the etching process has reached the desired depth, preventing over-etching of the actual gate stack while maintaining manufacturing precision
Solution Approach 2:
The dummy feature is created as a copy of the gate stack structure with the same material layers. This copy provides a surrogate for endpoint detection, allowing the etching process to be monitored and terminated at the correct point without directly measuring the gate stack itself, thereby preventing over-etching and improving reliability
2Manufacturing precision
If simultaneous etching of two conductive materials is performed using a same mask, then the gate stack is formed, but variability in the NVM array increases
Solution Approach 1:
The dummy feature acts as an intermediary reference structure that enables consistent endpoint detection across all etching operations. By providing a standardized material reference that is etched simultaneously with the gate stack, it ensures uniform etching depth and reduces variability in the NVM array characteristics
Solution Approach 2:
The dummy feature provides real-time feedback during the etching process through endpoint detection mechanisms. When the etching reaches the desired depth, changes in the dummy feature's material composition or structure are detected, providing feedback to terminate the etching process and prevent over-etching, thereby reducing variability
Data Source
AI summary
A first dielectric layer is formed on a substrate in a transistor region and an NVM region, a first conductive layer is formed on the first dielectric layer, a second dielectric layer is formed on the first conductive layer, and a second conductive layer is formed over the second dielectric layer. A patterned etch is performed to remove at least a portion of the second conductive layer in the transistor region and to expose an extension portion of the first conductive layer. A first mask is formed over the transistor region having a first pattern, wherein the first pattern is of a gate stack of the MOSFET and an extension in the extension portion extending from the gate stack, and a second mask over the NVM region having a second pattern, wherein the second pattern is of a gate stack of the NVM cell. A patterned etch is then performed.